Sanyo PLV-HD2000E, Руководство по обслуживанию

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172 Vss-PLL1 GND Vss for PLL1 (0V) - -
173 Vss-PLL2 GND Vss for PLL2 (0V) - -
174 CAP2 CAP2 Capacitor for PLL2[470pF] - -
175 Vcc-PLL2 1.9V Vcc for PLL2 (1.9V) - -
176 PCC0WAIT/PTH[6]/AUDCK AUDCK [ICE] AUD Clock - I
177 Vss GND Vss (0V) - -
178 Vcc 1.9V Vcc (1.9V) - -
179 XTAL (Reserve) X'tal (Open) -
180 EXTAL EXTAL External Clock / X'tal [33.3333MHz] - I
181 LCD15/PTM[3]/PINT[10] - (Open) -
182 LCD14/PTM[2]/PINT[9] PW_PG_SEL PIXEL Write (H: SH, L: PW) I
183 LCD13/PTM[1]/PINT[8] CONFIG_DONE FPGA1&2 Configuration Done - I
184 LCD12/PTM[0] CONFIG_INIT FPGA1&2 Configuration Status - I
185 STATUS0/PTJ[6] SDA_ICS IIC BUS DATA (ICS) - IO
186 STATUS1/PTJ[7] SCL_ICS IIC BUS CLOCK (ICS) - IO
187 CL2/PTH[7] 15.5V_SW
188 VssQ GND Vss for i/O (0V) - -
189 CKIO CKIO System Clock I/O - I/O
190 VccQ 3.3V Vcc for I/O (3.3V) - -
191 TxD0/SCPT[0] TxD0 Tx Data_0 [PIXEL] - O
192 SCK0/SCPT[1] (Open) -
193 TxD_SIO/SCPT[2] (Open) -
194 SIOMCLK/SCPT[3] (Pull-up) -
195 TxD2/SCPT[4] TxD2 Tx Data_2 [External] - O
196 SCK_SIO/SCPT[5] (Pull-up) -
197 SIOFSYNC/SCPT[6] (Pull-up) -
198 RxD0/SCPT[0] RxD0 Rx Data_0 [PIXEL] - I
199 RxD_SIO/SCPT[2] (Pull-up) -
200 Vss GND Vss (0V) - -
201 RxD2/SCPT[4] RxD2 Rx Data_2 [External] - I
202 Vcc 1.9V Vcc (1.9V) - -
203 SCPT[7]/CTS2/IRQ5 EXP_INTR SCI Port / Tx Clear_2 / External Interrupt O
204 LCD11/PTC[7]/PINT[3] SDA_SLOT4 IIC BUS DATA (Slot4) - IO
205 LCD10/PTC[6]/PINT[2] SCL_SLOT4 IIC BUS CLOCK (Slot4) - IO
206 LCD9/PTC[5]/PINT[1] SDA_SLOT3 IIC BUS DATA (Slot3) - IO
207 VssQ GND Vss for i/O (0V) - -
208 LCD8/PTC[4]/PINT[0] SCL_SLOT3 IIC BUS CLOCK (Slot3) - IO
209 VccQ 3.3V Vcc for I/O (3.3V) - -
210 LCD7/PTD[3] SYS SW Peripheral ICs Power SW (H= Off / L= On) O
211 LCD6/PTD[2] POWER_SW1 Power SW for MAIN Board (L= Off / H= On) O
212 LCD5/PTC[3] SDA_SLOT2 IIC BUS DATA (Slot2) - IO
213 LCD4/PTC[2] SCL_SLOT2 IIC BUS CLOCK (Slot2) - IO
214 LCD3/PTC[1] SDA_SLOT1 IIC BUS DATA (Slot1) - IO
215 LCD2/PTC[0] SCL_SLOT1 IIC BUS CLOCK (Slot1) - IO
216 LCD1/PTD[1] SDA_INNER IIC BUS DATA (Main) - IO
217 LCD0/PTD[0] SCL_INNER IIC BUS CLOCK (Main) - IO
218 DREQ0/PTD[4] --- DMA Request / Port_D (Pull-up) -
219 LCK/UCLK/PTD[6] UCLK USB Clock [48MHz] - I
220 RESETP RESETP Power On Reset Request - I
221 CA (Pull-up) -
222 MD3 MD3 Area_0 Bus Width Setting H I
223 MD4 MD4 Area_0 Bus Width Setting H I
224 Scan_testen 3.3V Test Pin (Set 3.3V) - I
225 AVcc_USB 3.3V USB Analog Vcc (3.3V) - -
226 USB1_P(analog) (USB1P) [Func] USB1 Data I/O (+) I/O
227 USB1_M(analog) (USB1M) [Func] USB1 Data I/O (-) I/O
228 AVss_USB GND USB Analog Vss (0V) - -
229 USB2_P(analog) (USB2P) [Host] USB2 Data I/O (+) I/O
230 USB2_M(analog) (USB2M) [Host] USB2 Data I/O (-) I/O
231 AVcc_USB 3.3V USB Analog Vcc (3.3V) - -
232 AVss GND USB Analog Vss (0V) - -
233 AN[2]/PTL[2] TEMP SENSOR AD Converter Input - I
234 AN[3]/PTL[3] AC SENSOR AD Converter Input - I
235 AN[4]/PTL[4] KEY1 KEY AD Converter Input - I
236 AN[5]/PTL[5] KEY2 KEY AD Converter Input - I
237 AVcc 3.3V Analog Vcc (3.3V) - -
238 AN[6]/PTL[6]/DA[1] KEY3 KEY AD Converter Input - I
239 AN[7]/PTL[7]/DA[0] OPT1 Option resistor AD Converter Input - I
240 AVss GND Analog Vss (0V) - -
Pin No. Name Function Name Function Polarity I/O
Control Port Functions