Sanyo MCD-Z165F, Руководство по обслуживанию

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BLOCK DIAGRAM DESCRIPTION
The phase comparison output terminal for
external
control.
4
Ground terminal for built-in
5
I Resistance connection terminal for
15 HFL I terminal of track search signal.
16 TES I terminal of tracking error signal.
17
18
19
21
TOFF 0 Output terminal of tracking off.
TGL 0 Output terminal for change of tracking gain.
JP+
0 Output terminal for jump control.
0 Output terminal for tracking jump control.
PCK 0 Clock monitor output terminal for EFM data
playback. (4.3218 MHz)
22 FSEQ 0 Output terminal for detect of SYNC signal.
DVDD
24 I/O
CONT2 l/O This output can control at serial control from
26 CONT3 l/O micro processor.
27 CONT4 l/O
CONT5 l/O
29
EMPH 0 Output terminal of monitor.
de-em
0 Output terminal of flag
31
DOUT 0 Output terminal of digital out
RVDD supply for R-ch
42 MUTER 0 output terminal for R-ch
XVDD Power supply of crystal oscillation
44 XOUT 0 Connection terminal of crystal oscillation
45
XIN I Connection terminal of crystal oscillation
46 XVSS GND of crystal oscillation
47 0 Output terminal for synchronizing of
sub-cord block
48
EFLG 0 Output terminal for correction monitor of Cl, C2,
Single and Double
49 0 Output terminal for sub-cord of T, U and W
SFSY 0 Output terminal for synchronizing signal of
sub-cord frame
TEST5 I Test pin
63 c s I Chip select terminal
64 TEST1 I Test pin
Quadruple Sampling
Filter
1 bit DAC
LP.F