– 36 –
BLOCK DIAGRAM SIGNAL LINES
NAND Flash
(1Gbit)
Application
CPU
A
A
Audio
Amp.
Line Out
TV Speakers
(10W+10W)
RESET
Clock
Memory
Interface
Unit
S/P DIF
USB 2.0
ATSC
Digital &
Analog
H.264, VC1
MPEG4
MPEG2
Decode
Audio
DAC
Dual-Audio
Processing
Unit
Vcc cont.
I R
Remote
Back Light cont. (BLON)
Video2
Audio
Audio
A
LVDS
Out
+12V
RF-IN
I2 C
IF
IF_AGC
Digital/
Analog
Tuner
Back Light level (PWM)
Key Switch
UART(Factory)
DD
XL/
R
Audio
ADC
Power LED
I2
C
DDC
DDC
DDR2
1Gbit
(533MHz)
PC Audio
(or DVI Audio)
PC
(D-Sub)
OP
AMP
USB
Light
Sensor
DDC
HDMI2
HDMI1
(or DVI)
HDMI3
Video3
Audio
A
I2S
UART(Debug)
DDC
Digital Unit
AnalogUnit
Video1
Composite
Video2
(Component/
Composite)
Video3
(Component)
Component/Composite
Component
Panel Unit
Video1
DDR2
1Gbit
(533MHz)
HDMI
SW
TMDS
DDC
I2C
USB
HUB
I2C
USB
USB
HDMI
PHY
H
D
M
I
M
U
HDMI
LINK
System
CPU
(300MHz)
Ethernet
Mac
Audio
DSP
1080p Motion
Adaptive
De-interlacer
AFE
Input
Mux
A/D
Converter
NTSC
Decoder
Graphics
Unit Scaler
Audio
MUX
ZR39790
D3.3V
D3.3V
3.3V
1.8V
5V_REG
3.3V
1.5V_DDR
2.5V
1.2V
1.5V
1.1V
A6100
IC001
IC6200
IC6560
IC5500
IC7600
IC5700
IC5701
IC6600
IC850
5V