Sanyo CP-088, Руководство по обслуживанию

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IC BLOCK DIAGRAM & DESCRIPTION
Pin Name Function
1 P7
7
/AN
7
2 P7
6
/AN
6
3 P7
5
/AN
5
8-bit C MOS I/O port with the same function
4 P7
4
/AN
4
as ports P2
4
- P2
7
5 P7
3
/AN
3
C MOS compatible input level
6 P7
2
/AN
2
C MOS 3-state output
7 P7
1
/AN
1
8 P7
0
/AN
0
9 PB
3
4-bit C MOS I/O port with the same
function as ports P2
4
- P2
7
10
PB
2
/DA C MOS compatible input level
C MOS 3-state output
11 P5
7
/S
RDY3
/AN
15
12 P5
6
/S
CLK3
/AN
14
13 P5
5
/S
OUT3
/AN
13
14 P5
4
/S
IN3
/AN
12
15 P5
3
/S
RDY2
/AN
11
8-bit C MOS I/O port with the same function
16 P5
2
/S
CLK2
/AN
10
as ports P2
4
- P2
7
17 P5
1
/S
OUT2
/AN
9
C MOS compatible input level
18 P5
0
/S
IN2
/AN
8
C MOS 3-state output
19 P6
7
/S
RDY1
/CS/S
CLK12
20 P6
6
/S
CLK11
21 P6
5
/S
OUT1
22 P6
4
/S
IN1
23 P6
3
/CNTR
1
24 P6
2
/CNTR
0
25 P6
1
/PWM
26 P6
0
27 P4
7
/T3
OUT
6-bit C MOS I/O port with the same
function as ports P2
4
- P2
7
28
P4
6
/T1
OUT
C MOS compatible input level
C MOS 3-state output
29 P4
5
/INT
1
/ZCR
2-bit input port
C MOS compatible input level
30 P4
4
/INT
4
6-bit C MOS I/O port with the same function
31 P4
3
/INT
3
as ports P2
4
- P2
7
32 P4
2
/INT
2
C MOS compatible input level
33 P4
1
C MOS 3-state output
34 P4
0
/INT
0
2-bit input port
C MOS compatible input level
35 RESET Reset input pin for active "L"
36 PB
1
/X
CIN
4-bit C MOS I/O port with the same
function as ports P2
4
- P2
7
37
PB
0
/X
OUT
C MOS compatible input level
C MOS 3-state output
Input and output pins for the main clock
generating circuit.
Feedback resistor is built in between
XIN pin and Xout pin.
38 X
IN
Connect a ceramic resonator or a
quartz-crystal oscillator between the X
I N
pin and X
OUT
pin to set oscillation
frequency.
39 X
OUT If an external clock is used, connect the
clock source to the X
IN
pin and leave the
X
OUT
pin open.
This clock is used as the oscillating
source of system clock.
40 V
SS
Apply voltage of 0V to V
S S
41 P2
7
4-bit I/O port
42 P2
6
I/O direction register allows each pin to
individually programmed as either input
or output.
43 P2
5
At reset this port is set to input mode.
44 P2
4
TTL input level
C MOS 3-state output
Pin Name Function
45 P2
3
/DIG
19
46 P2
2
/DIG
18
4-bit output port with the same function as port P0
47 P2
1
/DIG
17
48 P2
0
/DIG
16
49 P1
7
/DIG
15
50 P1
6
/DIG
14
51 P1
5
/DIG
13
52 P1
4
/DIG
12
8-bit output port with the same function as port P0
53 P1
3
/DIG
11
54 P1
2
/DIG
10
55 P1
1
/SEG
41
/DIG
9
56 P1
0
/SEG
40
/DIG
8
57 P0
7
/SEG
39
/DIG
7
58 P0
6
/SEG
38
/DIG
6
8-bit output port
59 P0
5
/SEG
37
/DIG
5
This port builds in pull-down resistor between
60 P0
4
/SEG
36
/DIG
4
port P0 and the V
EE
pin
61 P0
3
/SEG
35
/DIG
3
At reset this port is set to V
EE
level
62 P0
2
/SEG
34
/DIG
2
The high-breakdown-voltage P-channel open-
63 P0
1
/SEG
33
/DIG
1
drain
64 P0
0
/SEG
32
/DIG
0
65 P3
7
/SEG
31
66 P3
6
/SEG
30
67 P3
5
/SEG
29
68 P3
4
/SEG
28
8-bit output port with the same function as port P0
69 P3
3
/SEG
27
70 P3
2
/SEG
26
71 P3
1
/SEG
25
72 P3
0
/SEG
24
73 P9
7
/SEG
23
74 P9
6
/SEG
22
75 P9
5
/SEG
21
76 P9
4
/SEG
20
8-bit output port with the same function as port P0
77 P9
3
/SEG
19
78 P9
2
/SEG
18
79 P9
1
/SEG
17
80 P9
0
/SEG
16
81 P8
7
/SEG
15
82 P8
6
/SEG
14
83 P8
5
/SEG
13
8-bit I/O port with the same function as ports
84 P8
4
/SEG
12
P2
4
-P2
7
85 P8
3
/SEG
11
C MOS compatible input level
86 P8
2
/SEG
10
The high-breakdown-voltage P-channel open-
87 P8
1
/SEG
9
drain
88 P8
0
/SEG
8
89 PA
7
/SEG
7
90 PA
6
/SEG
6
91 V
CC
Apply voltage of 4.0 to 5.5V to V
C C
92 PA
5
/SEG
5
8-bit I/O port with the same function as ports
93 PA
4
/SEG
4
P2
4
-P2
7
94 PA
3
/SEG
3
C MOS compatible input level
95 PA
2
/SEG
2
The high-breakdown-voltage P-channel open-
96 PA
1
/SEG
1
drain
97 PA
0
/SEG
0
98 V
EE
Applies voltage supplied to pull-down
resistors of ports P0, P1, P2
0
-P2
3
, P3 and P9
GND input pin for A-D converter and D-A converter
Connect AV
SS
to V
SS
Reference voltage input pin for A-D converter and
D-A converter
99 AV
SS
V
REF
100
IC531 M38197MAA-636FP (Single Chip 8-bit C Mos)