- 5 -
IC BLOCK DIAGRAM & DESCRIPTION
3
4
5
LRCK
BICK
SDATA
10
VDD
9
VSS
PD
2
8
DEM
1
MCLK
16
CKS
11
VREF
13 AOUTR
12 VCMR
14 AOUTL
6
DID0
7
DIF1
15 VCML
Serial Input
Interface
De-emphasis
Control
8X
Interpolator
8X
Interpolator
Clock Divider
LPF
LPF
Function
Master Clock Pin
Power-Down Pin
When at "L", the AK4352 is power-down mode and is held in reset.
The AK4352 should always be reset upon power-up.
Serial Bit Input Clock Pin
This clock is used to latch audio data.
Audio Data Input Pin
L/R Clock Pin
This input determines which audio channel is currently being input on
SDATA
pin.
Digital Input Format Pin
These pins select one of four input modes.
De-emphasis Enable Pin
When at "H", de-emphasis of fs=44.1kHz is enabled.
Ground Pin
Power Supply Pin
Reference Voltage Input Pin
Normally connected to VDD.
Rch Comrnon Voltage Pin
Rch Analog Output Pin
Lch Analog Output Pin
Lch Common Voltage Pin
Master Clock Select Pin
"L": 256fs "H": 384fs
No.
1
2
3
4
5
12
13
14
15
16
I/O
I
I
I
I
I
O
O
O
O
I
Pin Name
MCLK
PD
BICK
SDATA
LRCK
VCMR
AOUTR
AOUTL
VCML
CKS
Note: All input pins should not be left floating.
IC501 AK4352(2V & Low Power Multi Bit)
www. xiaoyu163. com
QQ 376315150
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TEL 13942296513
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2
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TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299