QSEVEN-Q7ALx2 - Preliminary User Guide, Rev. 0.7
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Features and Interfaces
CAN Bus
6.1.
The CAN Bus interface is compliant with the CAN Bus V 2.0 specification and implemented via a LPC to GPIO bridge.
eMMC (option)
6.2.
The Embedded Multimedia Flash Card (eMMC) is eMMC 5.1 compatible and supports eMMC flash capacities from
2 GByte to 32 GByte (SLC) or from 2 GByte to 64 GByte (MLC). During the manufacturing process, Multi Level Cell
(MLC) eMMC is reconfigured to act as pseudo Single Level Cell (pSLC) eMMC to provide improved reliability,
endurance and performance.
The eMMC flash memory features are:
Up to 32 GByte (SLC) / 64 GB (MLC) eMMC 5.1 Flash
eMMC 5.1 compatible
Fast I2C
6.3.
Fast I2C (100 to 400 kHz) supports transfer between components on the same board. The Qseven-Q7ALx2 features
two I2C Interfaces. One standard I2C interface and one I2C interface multiplexed with the SM Bus.
The I2C controller supports:
Multimaster transfers
Clock stretching
Collision detection
Interruption on completion of an operation
GPIO
6.4.
The eight GPIO pins GPI00 (pin 185), GPIO1 (pin 186), GPIO2 (pin 187), GPIO3 (pin 188), GPIO4 (pin 189), GPIO5 (pin 190),
GPIO6 (pin 191) and GPIO7 (pin 192) on the Qseven® connector are pin shared with the LPC. An EEPROM bit is added so
that the carrier board can define if the pins are used as GPIO or LPC.
The GPIO or LPC option is configured in the BIOS setup:
Advanced>CPLD Configuration>GPIO-LPC Mux Select [Mux to LPC, Mux to GPIO]
JTAG
6.5.
Joint Test Action Group (JTAG) is an industry standard used to verify designs and test modules or boards after they
have been manufactured. JTAG tests for common problems by observing data at the device’s inputs and controlling
the data at the outputs. Simple tests can be performed to find manufacturing defects such as missing devices
unconnected pins or failed/dead devices. The JTAG signals are: TDI (Test Data In), TDO (Test Data Out), TMS (Test
Mode Select), TCK (Test Clock), and TRST (Test Report-optional).
