CONFIDENTIAL
// 21
4.5.
Pinout diagram of OSM-S i.MX8M Mini
Figure 8: pin assignment (top view)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
A
CSI_
DATA1_N
CSI_
DATA1_P
GND
CSI_
DATA2_N
CSI_
DATA2_P
GND
GND
UART_A_
RX
UART_C_
RX
B
CSI_
DATA0_P
GND
CSI_
CLOCK_N
CSI_
CLOCK_P
GND
CSI_
DATA3_N
CSI_
DATA3_P
GND
GND
UART_A_
TX
Vendor Defined
UART_C_
TX
C
CSI_
DATA0_N
CAM_MCK
I2C_CAM
_SDA /
CSI_TX_N
I2C_CAM
_SCL /
CSI_TX_P
VCC_6_
TEST
GND
UART_A_
RTS
UART_A_
CTS
Vendor Defined
TEST_
GENERIC
SDIO_A_
IOPWR
D
GND
GPIO_C_
0
GPIO_C_
1
GND
Vendor Defined Vendor Defined
GND
UART_B_
TX
UART_B_
RX
UART_B_
RTS
UART_B_
CTS
GPIO_A_
0
GND
GPIO_B_
0
SDIO_A_
WP
SDIO_A_
PWR_EN
UART_
CON_RX
UART_
CON_TX
E
GND
GPIO_C_
2
GPIO_C_
3
GND
GPIO_A_
1
PWM_
0
GPIO_B_
1
SDIO_A_
CMD
GND
F
GPIO_C_
4
GPIO_C_
5
GND
GPIO_A_
2
PWM_
1
GPIO_B_
2
GND
SDIO_A_
CLK
G
GPIO_C_
6
GPIO_C_
7
ETH_A_
(S)(R)(G)MII_
TXD1
ETH_A_
(S)(R)(G)MII_
TXD3
GPIO_A_
3
PWM_
2
GPIO_B_
3
SDIO_A_
D0
SDIO_A_
D1
H
GND
GND
ETH_A_
(S)(R)(G)MII_
TXD0
ETH_A_
(S)(R)(G)MII_
TXD2
GPIO_A_
4
GPIO_B_
4
SDIO_A_
D2
SDIO_A_
D3
J
ETH_A_
(R)(G)MII_
TX_CLK
GND
GPIO_A_
5
GPIO_B_
5
GND
SDIO_A_
CD#
K
ETH_A_
(S)(R)(G)MII_
RXD0
ETH_A_
(R)(G)MII_
TX_EN(_ER)
GPIO_A_
6
GPIO_B_
6
SDIO_B_
CLK
SDIO_B_
CMD
L
GND
GND
ETH_A_
(S)(R)(G)MII_
RXD1
GPIO_A_
7
GND
GPIO_B_
7
SDIO_B_
D0
SDIO_B_
D1
M
ETH_A_
(R)(G)MII_
RX_ DV(_ER)
GND
ETH_IOPWR
VCC_2_
TEST
GND
SDIO_B_
D2
N
ETH_A_
(S)(R)(G)MII_
RXD2
JTAG_
TCK(SWCLK)
JTAG_
TMS(SWDIO)
SDIO_B_
D3
SDIO_B_
D4
P
GND
GND
ETH_A_
(S)(R)(G)MII_
RXD3
Vendor Defined
JTAG_
TDI
GND
SDIO_B_
D5
SDIO_B_
D6
R
GND
PCIe_SM_
ALERT#
ETH_A_
(R)(G)MII_
RX_ CLK
GND
JTAG_
TDO(SWO)
BOOT_SEL1#
JTAG_
nTRST
GND
SDIO_B_
D7
T
PCIe_
SMCLK
PCIe_
Wake
ETH_MDIO
ETH_MDC
FORCE_RECOVE
RY#
SDIO_B_
IOPWR
SDIO_B_
CD#
U
PCIe_
SMDAT
GND
GND
SPI_A_
SDI_(IO0)
SPI_A_
SCK
SYS_RST#
VCC_OUT_IO
BOOT_SEL0#
SDIO_B_
WP
SDIO_B_
PWR_EN
V
GND
PCIe_A_
PERST#
SPI_A_
SDO_(IO1)
GND
Carrier_
PWR_EN
I2S_
MCLK
I2S_B_
DATA_IN
GND
I2S_A_
DATA_IN
W
PCIe_
REFCLK_P
PCIe_
CLKREQ#
GND
SPI_A_
/HOLD_(IO3)
SPI_A_
/WP_(IO2)
RTC_
PWR
I2S_
LRCLK
I2S_B_
DATA_OUT
I2S_
BITCLK
I2S_A_
DATA_OUT
Y
PCIe_
REFCLK_N
GND
VCC_5_
TEST
VCC_IN_
5V
VCC_IN_
5V
VCC_IN_
5V
VCC_IN_
5V
SPI_A_
CS0#
VCC_3_
TEST
VCC_IN_
5V
GND
VCC_4_
TEST
SPI_B_
SCK
SPI_B_
SDI
SPI_B_
SDO
AA
GND
GND
GND
GND
PWR_BTN#
GND
GND
GND
I2C_A_
SCL
I2C_A_
SDA
GND
GND
I2C_B_
SCL
I2C_B_
SDA
GND
SPI_B_
CS0#
AB
PCIe_A_
HSI0_P
PCIe_A_
HSI0_N
GND
DSI_
DATA3_P
DSI_
DATA3_N
GND
DSI_
CLOCK_P
DSI_
CLOCK_N
GND
DSI_
DATA0_P
DSI_
DATA0_N
USB_A_
D_N
USB_A_
ID
GND
USB_A_
VBUS
USB_B_
VBUS
GND
USB_B_
ID
USB_B_
D_N
AC
PCIe_A_
HSO0_P
PCIe_A_
HSO0_N
GND
DSI_
DATA2_P
DSI_
DATA2_N
GND
DSI_
DATA1_P
DSI_
DATA1_N
GND
USB_A_
D_P
USB_A_
OC#
USB_A_
EN
USB_B_
EN
USB_B_
OC#
USB_B_
D_P