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mITX-KBL-S-C236 Doc. Rev. 1.6

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Sub-Screen

Function

Description

DIMM SPD Alias Test

Test to determine if the SPD
has been corrupted to
cause memory aliasing

Receive Enable Centering 1D Enable/Disable Receive

Enable Centering 1D

Retrain Margin Check

Enable/Disable Retrain
Margin Check

Write Drive Strength Up/Dn
independently

Enable/Disable Write Drive
Strength Up/Dn
independently

CMD Slew Rate Training

Enable/Disable CMD Slew
Rate Training

CMD Drive Strength/ Tx
Equalization

Enable/Disable CMD Drive
Strength/ Tx Equalization

CMD Normalization

Enable/Disable CMD
Normalization

Memory Configuration

Display Memory
Configuration

MRC ULT Safe Config

MRC ULT Safe Config for PO

Maximum Memory Frequency

Maximum Memory
Frequency Selections in
Mhz

HOB Buffer Size

Size to set HOB Buffer

ECC Support

Enable/Disable DDR ECC
Support

Max TOLUD

Maximum value of TOLUD

SA GV

System Agent Geyserville

SA GV Low Freq

System Agent Geyserville.
Set frequency for low point

Retrain on Fast Fail

Restart MRC in Cold mode if
SW MemTest fails during
Fast flow

Command Tristate

Command Tristate Support

Enable RH Prevention

Activity prevent Row
Hammer

Row Hammer Solution

Type of method used to
prevent Row Hammer

RH Activation Probability

Used to adjust MC for
Hardware RHP

Exit on Failure (MRC)

Exit on Failure for MRC
training steps

MC Lock

Enable/Disable capacity to
lock or not MC registers

Содержание Kontron mITX-KBL-S-C236

Страница 1: ... USER GUIDE mITX KBL S C236 Doc Rev 1 6 Doc ID 1061 6790 ...

Страница 2: ...ill be suitable for the specified use without further testing or modification Kontron expressly informs the user that this manual only contains a general description of processes and instructions which may not be applicable in every individual case In cases of doubt please contact Kontron This manual is protected by copyright All rights are reserved by Kontron No part of this document may be repro...

Страница 3: ...quate design and operating safeguards You are solely responsible for compliance with all legal regulatory safety and security related requirements concerning your products You are responsible to ensure that your systems and any Kontron hardware or software components incorporated in your systems meet all applicable requirements Unless otherwise stated in the product documentation the Kontron devic...

Страница 4: ...om terms and conditions For contact information refer to the corporate offices contact information on the last page of this user guide or visit our website CONTACT US Customer Support Find Kontron contacts by visiting http www kontron com support Customer Service As a trusted technology innovator and global solutions provider Kontron extends its embedded market strengths into a services portfolio ...

Страница 5: ...o observe the precautions indicated and or prescribed by the law may endanger your life health and or result in damage to your material Please refer also to the High Voltage Safety Instructions portion below in this section ESD Sensitive Device This symbol and title inform that the electronic boards and their components are sensitive to static electricity Care must therefore be taken during all ha...

Страница 6: ...6 1 Processor Support 23 6 2 System Memory Support 23 6 3 Ethernet Connectors I O area 24 6 4 USB Connectors I O area 25 6 5 Audio Jack Connectors I O area 27 6 6 Fan Connectors internal 28 6 7 Front Panel 1 internal 29 6 8 COM1 COM2 Internal 30 6 9 Kontron Feature Connector GPIO Internal 31 6 10 CMOS1 Jumper 32 6 11 Always ON Jumper 32 6 12 LCD_PWR1 Internal 33 6 13 LVDS internal 33 6 14 SATA Ser...

Страница 7: ...18 COM1 2 Internal Connection 30 Table 19 Signal Description 30 Table 20 Pinout GPIO 31 Table 21 CMOS1 Internal Connection 32 Table 22 Always ON Jumper 32 Table 23 LCD_PWR1 Internal Connection 33 Table 24 LVDS Pin Assignment 33 Table 25 Pin Assignment 34 Table 26 Signal Description 34 Table 27 Power States 36 Table 28 Main Setup Menu Sub Screens Functions 37 Table 29 Advanced Setup Menu Sub Screen...

Страница 8: ...COM1 2 Internal Connector 2 mm raster 30 Figure 13 GPIO Internal Connector 31 Figure 14 CMOS1 Jumper 32 Figure 15 Always ON Jumper 32 Figure 16 LCD_PWR1 Internal Connector 33 Figure 17 LVDS Connector 33 Figure 18 SATA Connector 34 Figure 19 Available Cable Kit 34 ...

Страница 9: ... describing the mITX KBL S C236 board s special features and is not intended to be a standard PC textbook New users are recommended to study the short installation procedure stated in the following chapter before switching on the power All configuration and setup of the CPU board is either done automatically or manually by the user via the BIOS setup menus Latest revision of this manual datasheet ...

Страница 10: ...acteristics are Support 8th generation processors with LGA1151 CPU Socket 37 5 mm x 37 5 mm Range from 65 to 80 W TDP Intel KBL C236 PCH chipset 2x ECC NON ECC SODIMM Memory Architecture Max three displays by Display Port 3x DP and LVDS optional Three Gigabit Ethernet ports ECC memory optional Four SATA 3 0 Ports M 2 and PCIe minicard Built with these functions mITX KBL S C236 Mother Board is idea...

Страница 11: ...ents like RAM and CPU cooler mounted then relevant steps below can be skipped Only connect to a power supply delivering the specified input rating and complying with the requirements of Safety Extra Low Voltage SELV and Limited Power Source L P S of IEC 60950 1 and the Energy sources ES1 of IEC 62368 1 1 Turn off the PSU Power Supply Unit Turn off PSU Power Supply Unit completely no mains power co...

Страница 12: ...ed component can result in malfunction or no function at all When fixing the Motherboard on a chassis it is recommended to use screws with integrated washer and a diameter of 7 mm Do not use washers with teeth as they can damage the PCB and cause short circuits 3 3 Requirements IEC60950 1 Take care when designing chassis interface connectors in order to fulfil the IEC60950 1 standard Users of mITX...

Страница 13: ...explosión si la batería se sustituye incorrectamente Sustituya solamente por el mismo o tipo equivalente recomendado por el fabricante Disponga las baterías usadas según las instrucciones del fabricante ADVARSEL Lithiumbatteri Eksplosionsfare ved fejlagtig håndtering Udskiftning må kun ske med batteri af samme fabrikat og type Levér det brugte batteri tilbage til leverandøren ADVARSEL Eksplosjonsf...

Страница 14: ...mITX KBL S C236 Doc Rev 1 6 www kontron com 14 4 System specifications 4 1 Functional Block Diagram Figure 1 Functional Block Diagram ...

Страница 15: ...U and system temperature voltage status and fan speed TPM Kontron TPM 2 0 support via SPI USB interface Power management Support S5 S4 S3 S0 Battery CR2032 220 mAh See Safety Instructions below this table Expansion One PCIe x16 slot PCIe Gen3 Operating System Support Windows 10 External I O LAN USB3 0 3x RJ 45 LAN Port with two LED indicators dual USB3 0 dual USB2 0 4x USB Audio 3x Audio Jacks for...

Страница 16: ...VC H265m VP9 two 4k DisplayPorts optional 3 LVDS optional DP to LVDS Controller NXP PTN3460 Display Interface two Display Ports optional LVDS resp third DP Port optional Note Three 3 Independent Displays Max Resolution DP LVDS 4096x2304 60 Hz 24 bpp One panel display Ethernet Controller LAN1 Intel I219LM 10 100 1000 Gigabit Ethernet PHY with AMT11 0 LAN2 and LAN3 Intel I211AT 10 100 1000 Gigabit E...

Страница 17: ...6 4 Emission standard for industrial environments Safety EN 60950 1 2006 A11 2009 A1 2010 A12 2011 Safety for information technology equipment including electrical business equipment Shock IAW IEC 60068 2 27 Half sine wave Acceleration 2g Pulse duration 11ms number of shocks 600 shocks 100 shocks for each face Vibration AW IEC 60068 2 64 test Fh Random Vibration 90 min per axis 3 axes at 1 9 grms ...

Страница 18: ... Connect 5 1 1 Jumpers and Connectors Jumpers Function Remark CLR_CMOS1 Clear CMOS 1x 3 header Always_ON Always On Jumper 1x 3 header LCD_PWR1 LCD PWR 1x 3 header Connectors Function Remark CPU_FAN1 CPU FAN Connector 1x 4 wafer SYS_FAN1 SYS FAN Connector 1x 4 wafer FP1 Front Panel Connector 2x 12 header SPKR Speaker Connector 1x 4 wafer GPIO GPIO Port Connector 2x 5 box header LCD_BKL LCD Backligh...

Страница 19: ...wer interface 2 SATA connector 3 Battery holder 4 Memory connector 5 CPU connector 6 Speaker 7 PCIe connector 8 LVDS Connector 9 ATX 4 pin Power connector 10 LPC1 Bus 11 Sys Fan 12 COM2 COMB1 RS 232 13 COM1 COMA1 RS232 422 485 14 PCH chip controller 15 GPIO feature connector 16 24 pin Front Panel Header 1 2 4 6 5 10 9 8 7 14 13 3 11 12 15 16 ...

Страница 20: ...mITX KBL S C236 Doc Rev 1 6 www kontron com 20 Figure 3 Rear View with Interfaces 17 4xUSB 3xEthernet 18 2x Display Port 19 1x DisplayPort optional 20 Audio jacks 17 19 20 18 ...

Страница 21: ...mITX KBL S C236 Doc Rev 1 6 www kontron com 21 5 3 Rear Side Figure 4 Bottom Side 21 M 2 Interface 22 Mounting hole for M 2 card 21 22 ...

Страница 22: ...chmitt trigger input TTL compatible IOC Input open collector Output TTL compatible IOD Input Output CMOS level Schmitt triggered Open drain output NC Pin not connected O Output TTL compatible OC Output open collector or open drain TTL compatible OT Output with tri state capability TTL compatible LVDS Low Voltage Differential Signal PWR Power supply or ground reference pins Ioh Typical current in m...

Страница 23: ...e Speed Turbo Embed Cache Sspec TDP Tj Part number Core i7 7700 3 6 GHz 4 2 GHz Yes 8 MB SR338 65 W 100ºC 1060 9526 Core i5 7500 3 4 GHz 3 8 GHz Yes 8 MB SR335 65 W 100ºC 1060 9525 Core i3 7101E 3 9 GHz Yes 3 MB SR32Z 54 W 100ºC 1060 9524 Xeon E3 1275 V6 3 8 GHz 4 2 GHz Yes 8 MB SR32A 73 W 1060 9489 6 2 System Memory Support The memory system has two DDR4 sockets The sockets support the following ...

Страница 24: ...X D2 4 MDI1 D3 5 MDI2 D3 6 MDI2 RX D2 7 MDI3 D4 8 MDI3 D4 Table 8 Signal Description Signal Description MDI 0 MDI 0 In MDI mode this is the first pair in 1000Base T i e the BI_DA pair and is the transmit pair in 10Base T and 100Base TX In MDI crossover mode this pair acts as the BI_DB pair and is the receive pair in 10Base T and 100Base TX MDI 1 MDI 1 In MDI mode this is the second pair in 1000Bas...

Страница 25: ... 2 IO USB 3 USB2 0 3 0 3 IO USB 3 USB2 0 3 0 4 PWR GND USB2 0 3 0 5 IO RX 2 USB3 0 6 IO RX 2 USB3 0 7 PWR GND USB3 0 8 IO TX 2 USB3 0 9 IO TX 2 USB3 0 Table 10 Signal Description Signal Description USBn USBn RXn RXn TXn TXn Differential pair works as serial differential receive transmit data lines n 0 1 2 3 5 V SB5 V 5 V supply for external devices SB5 V is supplied during power down to allow wake...

Страница 26: ...d Figure 8 USB 3 0 High Speed Cable W G B R Polyvinyl Chloride PVC Jacket Outer Shield 65 Interwoven Tinned Copper Braid Inner Shield Aluminum Metallized Polyester 28 AWG Tinned Copper Drain Wire Twisted Signaling Pair White D Green D On Twisted Power Pair Red VBUS Black Power Ground UTP Signal Pair SDP Signal Pair Jacket Ground Filler optional Braid Power SDP Signal Pair ...

Страница 27: ...e Pin Designation Signal Type Note Tip LINE1_L IA 1 0 VRMS 30 kΩ Ring LINE1_R IA 1 0 VRMS 30 kΩ Sleeve GND PWR Table 13 Pin Assignment Mic In pink Pin Designation Signal Type Note Tip MIC1_L IA Ring MIC1_R IA Sleeve GND PWR Table 14 Signal Description Signal Description Note LINE1_L Line In signal Left LINE1_R Line In signal Right Front_L Line Out Left Shared with Audio Header Front_R Line Out Rig...

Страница 28: ...in order to implement FAN speed control Figure 10 4 pin Fan Connector Table 15 4 pin Mode Pin Signal Description Type 1 TACHO Fan speed control I 2 SEN Fan speed sense O 3 12 V Power 12 V PWR 4 GND Ground PWR Table 16 Signal Description Signal Description Type GND Power Supply GND signal PWR 12 V 12 V supply for fan A maximum of 2000 mA can be supplied from this pin PWR TACHO Tacho input signal fr...

Страница 29: ...igure 11 FP1 Connector Table 17 FP1 Connector Pin Signal Pin Signal 1 USB6 7_5V 2 USB6 7_5V 3 USB6 4 USB7 5 USB6 6 USB7 7 GND 8 GND 9 NC 10 LINE2 L 11 5V 12 5V 13 SATA_LED 14 SUS_LED 15 GND 16 PWRBTN_IN 17 RSTIN 18 GND 19 SBV3V3 20 LINE 2R 21 AGND 22 AGND 23 MIC2 L 24 MIC2 R 1 ...

Страница 30: ... Internal Connectors Pin Description Pin Description 1 NDCD 2 NDSR 3 NSIN 4 NRTS 5 NSOUT 6 NCTS 7 NDTR 8 NRI 9 GND 10 NC Table 19 Signal Description Signal Description NDCD Data Carrier Detect NDSR Data Set Ready NSIN User Input NRTS Request to Send NSOUT User Output NCTS Clear To Send NDTR Data Terminal Ready NRI Ring Indicator GND Ground ...

Страница 31: ... 1 CASE_OPEN 2 SMBC 3 S5 4 SMBD 5 PWR_OK 6 EXT_BAT 7 FAN3OUT 8 FAN3IN 9 SB3V3 10 SB5V 11 GPIO0 12 GPIO1 13 GPIO2 14 GPIO3 15 GPIO4 16 GPIO5 17 GPIO6 18 GPIO7 19 GND 20 GND 21 GPIO8 22 GPIO9 23 GPIO10 24 GPIO11 25 GPIO12 26 GPIO13 27 GPIO14 28 GPIO15 29 GPIO16 30 GPIO17 31 GND 32 GND 33 EGCLK 34 EGCS 35 EGAD 36 TMA0 37 12 V 38 GND 39 FAN4OUT 40 FAN4IN 41 GND 42 GND 43 GND 44 S3 ...

Страница 32: ...rnal Connection Pin Description 1 3V_BATT 2 RTCRST 3 GND Function Pin1 2 Default Position Pin2 3 Clear CMOS 6 11 Always ON Jumper Figure 15 Always ON Jumper Table 22 Always ON Jumper Pin Description 1 PWRBTN_N 2 PCH_RSMRST_N 3 GND Function Pin1 2 Always ON Enable Pin2 3 Always ON Disable Default Position 1 1 ...

Страница 33: ...nnector Table 24 LVDS Pin Assignment Pin Description Pin Description 1 12 V 2 12 V 3 12 V 4 12 V 5 12 V 6 GND 7 5 V 8 GND 9 LCDVCC 10 LCDVCC 11 DDC CLK 12 DDC DATA 13 BKLTCTL 14 VDD ENABLE 15 BKLTEN 16 GND 17 LVDS A0 18 LVDS A0 19 LVDS A1 20 LVDS A1 21 LVDS A2 22 LVDS A2 23 LVDS ACLK 24 LVDS ACLK 25 LVDS A3 26 LVDS A3 27 GND 28 GND 29 LVDS B0 30 LVDS B0 31 LVDS B1 32 LVDS B1 33 LVDS B2 34 LVDS B2 ...

Страница 34: ...nnector Table 25 Pin Assignment Pin Signal Type 1 GND PWR 2 SATA TX 3 SATA TX 4 GND PWR 5 SATA RX 6 SATA RX 7 GND PWR Table 26 Signal Description Signal Description SATA RX RX Host transmitter differential signal pair SATA TX TX Host receiver differential signal pair specifies 0 or 1 depending on SATA port Figure 19 Available Cable Kit PN 821035 Cable SATA 500 mm 1 2 3 4 5 6 7 ...

Страница 35: ...5 V min current 0 1A 144BThe ATX 12V specification does not clearly state a requirement for the ramp up of the 5VSB standby voltage However we strongly recommend to use only PSUs where the 5VSB ramp up follows the same rules as listed for 5VDC 145BThis should ensure that the board behaves properly in particular when powering up without or with a weak empty battery Only connect to a power supply de...

Страница 36: ... maintained on the disk All power is then shut off to the system except for the logic required to resume G2 S5 Soft Off SOFF System context is not maintained All power is shut off except for the logic required to restart A full boot is required when waking G3 Mechanical OFF MOFF System context not maintained All power is shut off except for the RTC No Wake events are possible This state occurs if ...

Страница 37: ... and provides basic system information as well as functions for setting the system time and date Table 28 Main Setup Menu Sub Screens Functions Sub Screen Function Description BIOS Information Display BIOS Vendor Core Version and etc Board Information Display Product Name PCB ID and etc Processor Information Display Name Type Speed and etc PCH Information Display Name PCH SKU and etc System Langua...

Страница 38: ...Prefetch To turn on off prefetching of adjacent cache lines Intel VMX Virtualization Technology Enable Disable Intel VMX Virtualization Technology PECI Enable Disable PECI Active Processor Core Number of cores to enable in each processor package BIST Enable Disable BIST Built In Self Test on reset JTAG C10 Power Enable Disable Power JTAG in C10 and deeper power states AP threads Idle Manner Ap thr...

Страница 39: ...nce CPU Power Managemen t Control Boot Performance mode Select the performance state that the BIOS will set starting from reset vector Intel R SpeedStep tm Allows more than two frequency to be supported Race To Halt RTH Enable Disable Race To Halt Intel R Speed Shift Technology Enable Disable Intel R Speed Shift Technology support HDC Control This option allows HDC configuration Turbo Mode Enable ...

Страница 40: ...Power Limit 1 Power Limit 2 Power Limit 1 Time Window ConfigTDP Turbo Activation Ratio CPU VR Settings PSYS Slope Display PSYS Slope PSYS Offset Display PSYS Offset PSYS Pmax Power Display PSYS Pmax Power Acoustic Noise Settings Acoustic Noise Mitigatio n Enable Disable Acoustic Noise Mitigation IA VR Domain Display Disable Fast PKG C State Ramp for IA Domain and Slow Slew Rate for IA Domain GT VR...

Страница 41: ...it Display VR Voltage Limit TDC Enable Enable Disable TDC TDC Current Limit Display TDC Current Limit TDC Time Windows TDC Time Window value in milliseconds 1ms is default Range from 1ms to 10ms except for 9ms as it has no valid encoding in the MSR definition TDC Lock Enable Disable TDC Lock GT UnSliced VR Settings VR Config Enable Enable Disable VR Config AC Loadline Display AC Loadline DC Loadli...

Страница 42: ...t TDC Enable Enable Disable TDC TDC Current Limit Display TDC Current Limit TDC Time Windows TDC Time Window value in milliseconds 1ms is default Range from 1ms to 10ms except for 9ms as it has no valid encoding in the MSR definition TDC Lock Enable Disable TDC Lock GT Sliced VR Settings VR Config Enable Enable Disable VR Config AC Loadline Display AC Loadline DC Loadline Display DC Loadline PS Cu...

Страница 43: ...r 9ms as it has no valid encoding in the MSR definition TDC Lock Enable Disable TDC Lock VR Mailbox Command options Display VR Mailbox Command options Platform PL1 Enable Enable Disable Platform Power Limit 1 Programming Platform PL2 Enable Enable Disable Platform Power Limit 2 Programming Power Limit 4 Override Enable Disable Power Limit 4 Override C States Enable Disable CPU Power Management Enh...

Страница 44: ...isplay Number of P states Energy performance gain Enable Disable Energy performance gain EPG DIMM Idd3N Display EPG DIMM Idd3N EPG DIMM Idd3P Display EPG DIMM Idd3P Power Limit 3 Settings Enable Disable Power Limit 3 Override CPU Lock Configuration CFG Lock Configure MSR 0XE2 15 CFG Lock bit Overclocking Lock Enable Disable Overclocking Lock GT Power Managemen t Control RC6 Render Standby Check to...

Страница 45: ...Watchdog Timer OS Timer Display OS Timer BIOS Timer Display BIOS Timer Secure Erase Configuration Secure Erase Mode Change Secure Erase module behavior Force Secure Erase Force Secure Erase on next boot OEM Flags Settings MEBx hotkey Pressed Enable Disable MEBx hotkey Pressed MEBx Selection Screen Enable Disable MEBx Selection Screen Hide Unconfigure ME Confirmation Prompt Enable Disable Hide Unco...

Страница 46: ...le Setting this option disables retry mechanism for all HECI APIs HECI Message check Disable Setting this option disables message check for Bios Boot Path when sending MBP HOB Skip Setting this option will skip MBP HOB HECI2 Interface Communication Adds and Removes HECI2 Device from PCI space KT Device Enable Disable KT Device IDER Device Enable Disable IDER Device End Of Post Message Enable Disab...

Страница 47: ...up option to control the SATA port RTD3 functionality Sata Port 2 Setup option to control the SATA port RTD3 functionality MiniCard SATA Port3 Setup option to control the SATA port RTD3 functionality Sata Port 4 Setup option to control the SATA port RTD3 functionality PCIe Remapped CR1 Display PCIe Remapped CR1 PCIe Remapped CR2 Display PCIe Remapped CR2 PCIe Remapped CR3 Display PCIe Remapped CR3...

Страница 48: ...evice Settings Display Device Settings Change Settings Select an optimal settings for Super IO Device Serial Port Console Redirection Console Redirection Enable Disable Console Redirection Console Redirection Settings Terminal Type Emulation ANSI Extended ASCII char set VT100 ASCII char set VT100 Extends VT100 to support color function keys etc VT UTF8 Uses UTF8 encoding to map Unicode Bits per se...

Страница 49: ...Driver Version Above 4G Decoding Enable Disable Above 4G Decoding Hot Plug Support Hot Plug Support Restore PCIE Registers Enable Disable Restore PCIE Registers Don t Reset VC TC Mapping Enable Disable Don t Reset VC TC Mapping Network Stack Configuration Network Stack Enable Disable UEFI Network Stack CSM Configuration CSM Support Enable Disable Compatibility Support Module NVMe Configuration NVM...

Страница 50: ... EMI Differential Output Swing Level Programmable LVDS signal swing to pre compensate for channel attenuation or allow for power saving Backlight Enable Disable Backlight Backlight Signal Inversion Enable Active High Disable Active Low for display panel Backlight signal Backlight PWM Frequency Set the PWM frequency the backlight Brightness Level Select the Brightness Level for the backlight of the...

Страница 51: ... Power and Thermal Throttling DDR PowerDown and idle counter BIOS BIOS is in control of DDR CKE mode and idle timer value For LPDDR Only DDR PowerDown and idle conter For LPDDR Only BIOS BIOS is in control of DDR CKE mode and idle timer value Refresh_2X_MODE Disable iMC enables 2xRef when warm and hot iMC enables 2xRef when hot LPDDR Thermal Sensor When enabled MC uses MR4 to read LPDDR thermal se...

Страница 52: ...gnores the EXTTS Closed Loop Therm Manage Enabled CLTM pcode algorithm will be used Open Loop Therm Manage Enabled OLTM pcode algorithm will be used Warm Thresho ld Ch0 Dimm0 Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Warm Thresho ld Ch0 Dimm1 Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Hot Thresho ld Ch0 Dimm0 Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Hot...

Страница 53: ...1 Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Hot Budget Ch0 Dimm0 Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Hot Budget Ch0 Dimm1 Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Warm Budget Ch1 Dimm0 Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Warm Budget Ch1 Dimm1 Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Hot Budget Ch1 Dimm0 Range ...

Страница 54: ...value 1 1024 1 x 4 2 y 0 Def Memory Thermal Management Enable Disable Memory Thermal Management Memory Training Algorithms Early Command Training Enable Disable Early Command Training Sense Amp Offset Training Enable Disable Sense Amp Offset Training Early ReadMPR Timing Centering 2D Enable Disable Early ReadMPR Timing Centering 2D Read MPR Training Enable Disable Read MPR Training Receive Enable ...

Страница 55: ...aining Enable Disable Read On Die Termination Training Read Equalization Training Enable Disable Read Equalization Training Read Amplifier Training Enable Disable Read Amplifier Training Write Timing Centering 2D Enable Disable Write Dq DqsTiming Centering 2D Read Timing Centering 2D Enable Disable Read Dq Dqs Timing Centering 2D Command Voltage Centering Enable Disable Command Voltage Centering W...

Страница 56: ... Memory Configuration Display Memory Configuration MRC ULT Safe Config MRC ULT Safe Config for PO Maximum Memory Frequency Maximum Memory Frequency Selections in Mhz HOB Buffer Size Size to set HOB Buffer ECC Support Enable Disable DDR ECC Support Max TOLUD Maximum value of TOLUD SA GV System Agent Geyserville SA GV Low Freq System Agent Geyserville Set frequency for low point Retrain on Fast Fail...

Страница 57: ...d VC1 Read Metering Threshold threshold of counter within time window Strong Weak Leaker Value for Strong Weak Leaker Memory Scrambler Enable Disable Memory Scrambler Force ColdReset Force ColdReset OR Choose MrcColdBoot mode when coldboot is required during MRC execution Channel A DIMM Control Channel A DIMM Control Support Enable or Disable Dimms on Channel A Channel B DIMM Control Channel B DIM...

Страница 58: ... Card on PEG and PCH PCIE Ports External Gfx Card Primary Display Configuration External Gfx Card Primary Display Configuration Internal Graphics Keep IGFX enabled based on the setup options GTT Size Select the GTT Size Aperture Size Select the Aperture Size Note Above 4BG MMIO BIOS assignment is automatically enable when selecting 2048MB aperture DVMT Pre Allocated Select DVMT 5 0 Pre Allocated F...

Страница 59: ...tic Phase Eq Program Phase1 Preset CTLEp Gen3 Root Port Preset value for each Lane Lane 0 Value for Lane 0 Lane 1 Value for Lane 1 Lane 2 Value for Lane 2 Lane 3 Value for Lane 3 Gen3 Endpoint Preset value for each Lane Lane 0 Value for Lane 0 Lane 1 Value for Lane 1 Lane 2 Value for Lane 2 Lane 3 Value for Lane 3 Gen3 Endpoint Hint value for each Lane Lane 0 Value for Lane 0 Lane 1 Value for Lane...

Страница 60: ...ot Power Limit Value Sets the upper limit on power supplied by slot PEG1 Slot Power Limit Scale Select the scale used for the slot power limit value PEG1 Physical Slot Number Set the physical slot number attached to this port PEG 0 1 2 Enable Root Port Enable Disable the Root Port Max Link Speed Configure PEG 0 1 2 Max Speed PEG2 Slot Power Limit Value Sets the upper limit on power supplied by slo...

Страница 61: ... for Lane 14 Lane 15 Value for Lane 15 Gen3 Endpoint Preset value for each Lane Lane 0 Value for Lane 0 Lane 1 Value for Lane 1 Lane 2 Value for Lane 2 Lane 3 Value for Lane 3 Lane 4 Value for Lane 4 Lane 5 Value for Lane 5 Lane 6 Value for Lane 6 Lane 7 Value for Lane 7 Lane 8 Value for Lane 8 Lane 9 Value for Lane 9 Lane 10 Value for Lane 10 Lane 11 Value for Lane 11 Lane 12 Value for Lane 12 La...

Страница 62: ...4 Lane5 Bundle3 Gen3 RxCTLE setting for Bundle3 Lane6 Lane7 Bundle4 Gen3 RxCTLE setting for Bundle4 Lane8 Lane9 Bundle5 Gen3 RxCTLE setting for Bundle5 Lane10 Lane11 Bundle6 Gen3 RxCTLE setting for Bundle6 Lane12 Lane13 Bundle7 Gen3 RxCTLE setting for Bundle7 Lane14 Lane15 RxCTLE Override When Enables it overrides PEG s RxCTLE adaptive behavior Always Attempt SW EQ Always Attempt SW EQ even it has...

Страница 63: ...e testing Stop Grant Configuration Automatic Manual stop grant configuration VT d VT d capability CHAP Device B0 D7 F0 Enable Disable SA CHAP Device Thermal Device B0 D4 F0 Enable Disable SA Thermal Device GMM Device B0 D8 F0 Enable Disable SA GMM Device CRID Support Enable Disable CRID control for Intel SIPP Above 4GB MMIO BIOS assignmnet Enable Disable Above 4GB MemoryMappedIO BIOS assignmnet X2...

Страница 64: ...IE2 Cp Display PCIE2 Cp PCIE3 Cm Display PCIE3 Cm PCIE3 Cp Display PCIE3 Cp PCIE4 Cm Display PCIE4 Cm PCIE4 Cp Display PCIE4 Cp PCIE5 Cm Display PCIE5 Cm PCIE5 Cp Display PCIE5 Cp PCIE6 Cm Display PCIE6 Cm PCIE6 Cp Display PCIE6 Cp PCIE7 Cm Display PCIE7 Cm PCIE7 Cp Display PCIE7 Cp PCIE8 Cm Display PCIE8 Cm PCIE8 Cp Display PCIE8 Cp PCIE9 Cm Display PCIE9 Cm PCIE9 Cp Display PCIE9 Cp PCIE10 Cm Di...

Страница 65: ... x x 1 2 etc Depends on available port PCI Express Root Port x Control the PCI Express Root Port Topology Identify the SATA topology if it is default or ISATA or Flex or Direct Connect or M2 ASPM Set the ASPM level L1 Substates PCI Express L1 Substates settings Gen3 Eq Phase3 Method PCIe Gen3 Equalization Phase 3 Method UPTP Upstream Port Transmitter Preset DPTP Downstream Port Transmitter Preset ...

Страница 66: ...lf Swing Enable Disable Transmitter Half Swing Detect Timeout The number of miliseconds reference code will wait for link to exit Detect state for enable ports before assuming there is no device and potentially disabling Extra Bus Reserved Extra Bus Reserved 0 7 for bridges behind this root bridge Reserved Memory Reserved Memory for this root bridge 1 20 MB Reserved I O Reserved I O 4K 8K 12K 16K ...

Страница 67: ...HDD Unlock If enabled indicates that the HDD password unlock in the OS is enable LED Locate If enabled indicates that the LED SGPIO hardware is attached and ping to locate feature is enable on the OS Aggressive LPM Support Enable PCH to aggressively enter link power state SATA Controller Speed Indicates the maximum speed the SATA controller can support SATA0 M 2 Software Preserve Unknown Software ...

Страница 68: ...ology if it is default or ISATA or Flex or Direct Connect or M2 SATA Port1 DevSlp Enable Disable SATA Port1 DevSlp DITO Configuration Enable Disable DITO Configuration DITO Value Display DITO Value DM Value Display DM Value SATA2 J10 Software Preserve Unknown Software Preserve Port 2 Enable Disable SATA Port Hot Plug Designates this port as Hot Pluggable Configured as eSATA Hot Plug Supported Spin...

Страница 69: ...ct or M2 SATA Port3 DevSlp Enable Disable SATA Port3 DevSlp DITO Configuration Enable Disable DITO Configuration DITO Value Display DITO Value DM Value Display DM Value SATA6 J11 Software Preserve Unknown Software Preserve Port 6 Enable Disable SATA Port Hot Plug Designates this port as Hot Pluggable Configured as eSATA Hot Plug Supported Spin Up Device Enable Disable Spin Up Device SATA Device Ty...

Страница 70: ...y DITO Value DM Value Display DM Value USB Configuration XHCI Disable Compliance Mode Options to disable compliance mode xDCI Support Enable Disable xDCI USB OTG Device USB Port Disable Override Selectively Enable Disable the corresponding USB port from reporting a Device Connection to the controller Security Configuration RTC Lock Enable will lock bytes 38h 3Fh in the lower upper 128 byte bank of...

Страница 71: ...atically Switchable BCLK Clock Frequency Configuration HD Audio Link Frequency Select HD Audio Link Frequency iDisplay Link Frequency Select iDisplay Link frequency HD Audio DSP Features Configuration Audio DSP NHLT Endpoints Configuration DMIC 4 Mic Array Bluetooth Enables Disables Bluetooth I2S Enables Disables I2S Audio DSP Feature Support WoV Wake on Voice Enables Disables DSP Feature Bluetoot...

Страница 72: ...s Disables 3rd Party Processing Module Support identified by GUID Maxim Smart AMP Enables Disables 3rd Party Processing Module Support identified by GUID FortMedia SAMSoft Enables Disables 3rd Party Processing Module Support identified by GUID Intel WoV Enables Disables 3rd Party Processing Module Support identified by GUID Sound Research IP Enables Disables 3rd Party Processing Module Support ide...

Страница 73: ...identified by GUID Serial IO Configuration I2C0 Controller Enables Disables Serial IO Controller I2C1 Controller Enables Disables Serial IO Controller I2C2 Controller Enables Disables Serial IO Controller I2C3 Controller Enables Disables Serial IO Controller SPI0 Controller Enables Disables Serial IO Controller SPI1 Controller Enables Disables Serial IO Controller UART0 Controller Enables Disables...

Страница 74: ... UART Test Device Choose if UART Test Device is used and with which controller Additional Serial IO devices When enabled ACPI will report additional devices connected to Serial IO SerialIO timing parameters SerialIO timing parameters test only UCSI UCMC device When enabled ACPI will report UCSI UCMC device TraceHub Configuration Menu TraceHub Enable Mode Select Enable Disable or Debugger MemRegion...

Страница 75: ... integrated LAN to wake the system SLP_LAN Low on DC Power Enable Disable SLP_LAN Low on DC Power K1 off Enable Disable K1 off feature CLKREQ Wake on WLAN and BT Enable Enable Disable PCI Express Wireless LAN and Bluetooth to wake the system Disable DSX ACPRESENT PullDown Disable PCH internal ACPRESENT PullDown when DeepSx or G3 exit CLKRUN logic Enable the CLKRUN logic to stop the PCI clocks Seri...

Страница 76: ... 4 Security Setup Menu The Security Setup menu provides information about the passwords and functions for specifying the security settings The passwords are case sensitive Table 31 Security Setup Menu Functions Function Description Administrator Password Set Administrator Password User Password Set user password Trusted Computing Security Device Support Enable Disable BIOS support for security dev...

Страница 77: ...ode secure boot variables can be configured without authentication Key Management Provision Factory Defaults Allow to provision factory default secure boot keys when system is in setup mode Install Factory Default Keys Force system to user mode install factory default keys Enroll Efi Image Allow the image to run in Secure Boot mode Save all secure boot variables Secure boot variables Platform Key ...

Страница 78: ...handling changes made to the UEFI BIOS settings and the exiting of the Setup program Table 33 Save Exit Setup Menu Functions Function Description Save Changes and Exit Exit system setup after saving the changes Discard Changes and Exit Exit system setup without saving any changes Save Changes and Reset Reset the system after saving the changes Discard Changes and Reset Reset system setup without s...

Страница 79: ...d responsible for any loss or damage caused to the equipment received without an RMA number The buyer accepts responsibility for all freight charges for the return of goods to Kontron s designated facility Kontron will pay the return freight charges back to the buyer s location in the event that the equipment is repaired or replaced within the stipulated warranty period Follow these steps before r...

Страница 80: ...nd ESD protection Goods returned to Kontron Europe GmbH in non proper packaging will be considered as customer caused faults and cannot be accepted as warranty repairs 4 Include the RMA Number with the shipping paperwork and send the product to the delivery address provided in the RMA form or received from Kontron RMA Support ...

Страница 81: ...CC Error Checking and Correction FRU Field Replaceable Unit GPU Graphics Processing Unit HD Hard Disk mITX Mini ITX PCIe PCI Express PECI Platform Environment Control Interface RTC Real Time Clock TPM Trusted Platform Module UEFI Unified Extensible Firmware Interface ...

Страница 82: ... tailor made solutions based on highly reliable state of the art embedded technologies Kontron provides secure and innovative applications for a variety of industries As a result customers benefit from accelerated time to market reduced total cost of ownership product longevity and the best fully integrated applications overall For more information http www kontron com HEADQUARTERS KONTRON S T AG ...

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