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mITX-SKL-S-C236 Doc. Rev. 1.6

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Sub-Screen

Function

Description

Time Centering 2D

Write Timing Centering 1D

Enable/Disable Write
Timing Centering 1D

Write Voltage Centering 1D

Enable/Disable Write
Voltage Centering 1D

Read Timing Centering 1D

Enable/Disable Read Timing
Centering 1D

Dimm ODT Training*

Dimm On-Die Termination
Training

Max RTT_WR

Caps the maximum
RTT_WR in power training

DIMM RON Training*

Enable/Disable DIMM RON
Training

Write Drive
Strenght/Equalization 2D*

Enable/Disable Write Drive
Strenght/Equalization 2D

Write Slew Rate Training*

Enable/Disable Write Slew
Rate Training

Read ODT Training*

Enable/Disable Read On-
Die Termination Training

Read Equalization Training*

Enable/Disable Read
Equalization Training

Read Amplifier Training*

Enable/Disable Read
Amplifier Training

Write Timing Centering 2D

Enable/Disable Write Dq-
DqsTiming Centering 2D

Read Timing Centering 2D

Enable/Disable Read Dq-
Dqs Timing Centering 2D

Command Voltage Centering Enable/Disable Command

Voltage Centering

Write Voltage Centering 2D

Enable/Disable Write
Voltage Centering 2D

Read Voltage Centering 2D

Enable/Disable Read
Voltage Centering 2D

Late Command Training

Enable/Disable Late
Command Training

Round Trip Latency

Enable/Disable Round Trip
Latency

Turn Around Timing Training Enable/Disable Turn

Around Timing Training

Rank Margin Tool

Enable/Disable Rank
Margin Tool Training

Memory Test

Enable/Disable Memory
Test Training

Содержание Kontron Mini ITX Skylake S/C236

Страница 1: ...USER GUIDE mITX SKL S C236 Doc Rev 1 6 Doc ID 1061 1791...

Страница 2: ...mITX SKL S C236 Doc Rev 1 6 www kontron com 2 This page has been intentionally left blank...

Страница 3: ...l be suitable for the specified use without further testing or modification Kontron expressly informs the user that this manual only contains a general description of processes and instructions which...

Страница 4: ...uate design and operating safeguards You are solely responsible for compliance with all legal regulatory safety and security related requirements concerning your products You are responsible to ensure...

Страница 5: ...ron com terms and conditions For contact information refer to the corporate offices contact information on the last page of this user guide or visit our website CONTACT US Customer Support Find Kontro...

Страница 6: ...observe the precautions indicated and or prescribed by the law may endanger your life health and or result in damage to your material Please refer also to the High Voltage Safety Instructions portion...

Страница 7: ...Processor Support 24 6 2 System Memory Support 24 6 3 Ethernet Connectors I O area 25 6 4 USB Connectors I O area 26 6 5 Display Port DP V1 2 Connectors I O area 27 6 6 Audio Jack Connectors I O area...

Страница 8: ...pink 28 Table 16 Signal Description 28 Table 17 4 pin Mode Pin Assignment 29 Table 18 Signal Description 29 Table 19 FP Connector Pin Assignment 30 Table 20 USB Internal Connection Pin Assignment 30 T...

Страница 9: ...udio Jack 28 Figure 11 4 pin Fan Connector 29 Figure 12 FP Connector 30 Figure 13 USB Internal Connector 30 Figure 14 COM1 2 External Connector 31 Figure 15 Available Cable Kit DB9 adapter cables 31 F...

Страница 10: ...cribing the mITX SKL S C236 board s special features and is not intended to be a standard PC textbook New users are recommended to study the short installation procedure stated in the following chapte...

Страница 11: ...65W TDP Intel SKL C236 PCH chipset 2x ECC NON ECC SODIMM Memory Architecture Max three independent displays by Display Port 3x DP or LVDS Three Gigabit Ethernet ports ECC memory optional Four SATA 3...

Страница 12: ...like RAM and CPU cooler mounted then relevant steps below can be skipped Only connect to a power supply delivering the specified input rating and complying with the requirements of Safety Extra Low V...

Страница 13: ...PCB which can easily be damaged if board is handled without reasonable care A damaged component can result in malfunction or no function at all Vibration may cause damage to boards When setting up boa...

Страница 14: ...losi n si la bater a se sustituye incorrectamente Sustituya solamente por el mismo o tipo equivalente recomendado por el fabricante Disponga las bater as usadas seg n las instrucciones del fabricante...

Страница 15: ...mITX SKL S C236 Doc Rev 1 6 www kontron com 15 4 System specifications 4 1 Functional Block Diagram Figure 1 Functional Block Diagram...

Страница 16: ...speed TPM Kontron TPM 2 0 support via SPI USB interface Power management Support S5 S4 S3 S0 Battery CR2032 220 mAh See Safety Instructions below this table Expansion One PCIe x16 slot PCIe Gen3 Mini...

Страница 17: ...HEVC H265m VP9 4k x 2k HDMI and two DisplayPorts optional 3 LVDS optional DP to LVDS Controller NXP PTN3460 Display Interface 3x Display port 1 2 or 2x Display Ports 1 x LVDS Note Three 3 Independent...

Страница 18: ...4 Emission standard for industrial environments Safety EN 60950 1 2006 A11 2009 A1 2010 A12 2011 Safety for information technology equipment including electrical business equipment Shock IAW IEC 6006...

Страница 19: ...x 3 header Connectors Function Remark CPU_FAN1 CPU FAN Connector 1 x 4 wafer SYS_FAN1 SYS FAN Connector 1 x 4 wafer FP1 Front Panel Connector 2 x 12 header USB2_P1 USB 2 0 Connector 2 x 5 header USB2...

Страница 20: ...S C236 variant with three display ports 1 ATX 12 V power interface 2 SATA connector 3 Battery holder 4 Memory socket 5 CPU socket 6 Buzzer 7 PCIe x16 connector 8 LVDS Connector 9 ATX 4 pin Power conn...

Страница 21: ...www kontron com 21 Figure 3 Rear View with Interfaces Figure 3 shows the mITX SKL S C236 variant with three display ports 17 4x USB 2x USB 3 0 2x USB 2 0 3xEthernet 18 2x Display Port 19 Display Port...

Страница 22: ...mITX SKL S C236 Doc Rev 1 6 www kontron com 22 5 3 Rear Side Figure 4 Bottom Side 21 M 2 Connector 21...

Страница 23: ...hmitt trigger input TTL compatible IOC Input open collector Output TTL compatible IOD Input Output CMOS level Schmitt triggered Open drain output NC Pin not connected O Output TTL compatible OC Output...

Страница 24: ...ar all based on Embedded CPUs Table 5 Processor Support Name Speed Turbo Embed Cache Sspec TDP Tj Core i7 6700 3 4 GHz 4 0 GHz Yes 8 MB SR2L2 65 W 71 C Core i5 6500 3 2 GHz 3 6 GHz Yes 6 MB SR2L6 65 W...

Страница 25: ...d is the transmit pair in 10Base T and 100Base TX In MDI crossover mode this pair acts as the BI_DB pair and is the receive pair in 10Base T and 100Base TX MDI 1 MDI 1 In MDI mode this is the second p...

Страница 26: ...al pair works as serial differential receive transmit data lines n 0 1 2 3 5 V SB5 V 5 V supply for external devices SB5 V is supplied during power down to allow wakeup on USB device activity Protecte...

Страница 27: ...play Port DP V1 2 Connectors I O area Figure 9 DP 1 2 Connector Table 11 DP 1 2 Connector Pin Assignment Pin Signal Name Signal Name Pin 1 Link0 GND 2 3 Link0 Link1 4 5 GND Link1 6 7 Link2 GND 8 9 Lin...

Страница 28: ...gnation Signal Type Note Tip MIC1_L IA Ring MIC1_R IA Sleeve GND PWR Table 16 Signal Description Signal Description Note LINE1_L Line In signal Left LINE1_R Line In signal Right Front_L Line Out Left...

Страница 29: ...to implement FAN speed control Figure 11 4 pin Fan Connector Table 17 4 pin Mode Pin Assignment Pin Signal Description Type 1 TACHO Fan speed control I 2 SEN Fan speed sense O 3 12 V Power 12 V PWR 4...

Страница 30: ...USB7 5 USB6 6 USB7 7 GND 8 GND 9 NC 10 LINE2 L 11 5V 12 5V 13 SATA_LED 14 SUS_LED 15 GND 16 PWRBTN_IN 17 RSTIN 18 GND 19 SB3V3 20 LINE2 R 21 AGND 22 AGND 23 MIC2 L 24 MIC2 R 6 9 USB1 USB2 Internal op...

Страница 31: ...cription 1 NDCD 2 NDSR 3 NSIN 4 NRTS 5 NSOUT 6 NCTS 7 NDTR 8 NRI 9 GND 10 5V Table 22 Signal Description Signal Description NDCD Data Carrier Detect NDSR Data Set Ready NSIN User Input NRTS Request to...

Страница 32: ...ion 1 CASE_OPEN 2 SMBC 3 S5 4 SMBD 5 PWR_OK 6 EXT_BAT 7 FAN3OUT 8 FAN3IN 9 SB3V3 10 SB5V 11 GPIO0 12 GPIO1 13 GPIO2 14 GPIO3 15 GPIO4 16 GPIO5 17 GPIO6 18 GPIO7 19 GND 20 GND 21 GPIO8 22 GPIO9 23 GPIO...

Страница 33: ...Pin Assignment Pin Description 1 3V_BATT 2 RTCRST 3 GND Function Pin1 2 Default Position Pin2 3 Clear CMOS 6 13 Always ON Jumper Internal Figure 18 Always ON Jumper Table 25 Always ON Jumper Pin Assig...

Страница 34: ...LVDS internal Figure 20 LVDS Connector Table 27 LVDS Pin Assignment Pin Description Pin Description 1 12 V 2 12 V 3 12 V 4 12 V 5 12 V 6 GND 7 5 V 8 GND 9 LCDVCC 10 LCDVCC 11 DDC CLK 12 DDC DATA 13 BK...

Страница 35: ...nal Figure 21 SATA Connector Table 28 SATA Pin Assignment Pin Signal Type 1 GND PWR 2 SATA TX 3 SATA TX 4 GND PWR 5 SATA RX 6 SATA RX 7 GND PWR Table 29 Signal Description Signal Description SATA RX R...

Страница 36: ...l operate from standard ATX BTX compliant power supplies For example the Sparkle Model No FSP300 60BTVS meets this requirement and is an ATX12V 1 1 Spec compliant power supply Only connect to a power...

Страница 37: ...erve this required off state time may mean that parts of the board or peripherals work incorrectly or suffer a reduction of MTBF The minimum off state time to allow internal voltages to discharge suff...

Страница 38: ...maintained on the disk All power is then shut off to the system except for the logic required to resume G2 S5 Soft Off SOFF System context is not maintained All power is shut off except for the logic...

Страница 39: ...and provides basic system information as well as functions for setting the system time and date Table 31 Main Setup Menu Sub Screens Functions Sub Screen Function Description BIOS Information Display...

Страница 40: ...refetch To turn on off prefetching of adjacent cache lines Intel VMX Virtualization Technology Enable Disable Intel VMX Virtualization Technology PECI Enable Disable PECI Active Processor Core Number...

Страница 41: ...ce CPU Power Managemen t Control Boot Performance mode Select the performance state that the BIOS will set starting from reset vector Intel R SpeedStep tm Allows more than two frequency to be supporte...

Страница 42: ...ower Limit 1 Power Limit 2 Power Limit 1 Time Window ConfigTDP Turbo Activation Ratio CPU VR Settings PSYS Slope Display PSYS Slope PSYS Offset Display PSYS Offset PSYS Pmax Power Display PSYS Pmax Po...

Страница 43: ...t Display VR Voltage Limit TDC Enable Enable Disable TDC TDC Current Limit Display TDC Current Limit TDC Time Windows TDC Time Window value in milliseconds 1ms is default Range from 1ms to 10ms except...

Страница 44: ...TDC Enable Enable Disable TDC TDC Current Limit Display TDC Current Limit TDC Time Windows TDC Time Window value in milliseconds 1ms is default Range from 1ms to 10ms except for 9ms as it has no vali...

Страница 45: ...9ms as it has no valid encoding in the MSR definition TDC Lock Enable Disable TDC Lock VR Mailbox Command options Display VR Mailbox Command options Platform PL1 Enable Enable Disable Platform Power...

Страница 46: ...splay Number of P states Energy performance gain Enable Disable Energy performance gain EPG DIMM Idd3N Display EPG DIMM Idd3N EPG DIMM Idd3P Display EPG DIMM Idd3P Power Limit 3 Settings Enable Disabl...

Страница 47: ...atchdog Timer OS Timer Display OS Timer BIOS Timer Display BIOS Timer Secure Erase Configuration Secure Erase Mode Change Secure Erase module behavior Force Secure Erase Force Secure Erase on next boo...

Страница 48: ...e Setting this option disables retry mechanism for all HECI APIs HECI Message check Disable Setting this option disables message check for Bios Boot Path when sending MBP HOB Skip Setting this option...

Страница 49: ...p option to control the SATA port RTD3 functionality Sata Port 2 Setup option to control the SATA port RTD3 functionality MiniCard SATA Port3 Setup option to control the SATA port RTD3 functionality S...

Страница 50: ...vice Settings Display Device Settings Change Settings Select an optimal settings for Super IO Device Serial Port Console Redirection Console Redirection Enable Disable Console Redirection Console Redi...

Страница 51: ...river Version Above 4G Decoding Enable Disable Above 4G Decoding Hot Plug Support Hot Plug Support Restore PCIE Registers Enable Disable Restore PCIE Registers Don t Reset VC TC Mapping Enable Disable...

Страница 52: ...EMI Differential Output Swing Level Programmable LVDS signal swing to pre compensate for channel attenuation or allow for power saving Backlight Enable Disable Backlight Backlight Signal Inversion Ena...

Страница 53: ...Power and Thermal Throttling DDR PowerDown and idle counter BIOS BIOS is in control of DDR CKE mode and idle timer value For LPDDR Only DDR PowerDown and idle conter For LPDDR Only BIOS BIOS is in con...

Страница 54: ...nores the EXTTS Closed Loop Therm Manage Enabled CLTM pcode algorithm will be used Open Loop Therm Manage Enabled OLTM pcode algorithm will be used Warm Thresho ld Ch0 Dimm0 Range 255 0 31 875 0 in W...

Страница 55: ...Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Hot Budget Ch0 Dimm0 Range 255 0 31 875 0 in W for OLTM 127 5 0 in C for CLTM Hot Budget Ch0 Dimm1 Range 255 0 31 875 0 in W for OLTM 127 5 0...

Страница 56: ...alue 1 1024 1 x 4 2 y 0 Def Memory Thermal Management Enable Disable Memory Thermal Management Memory Training Algorithms Early Command Training Enable Disable Early Command Training Sense Amp Offset...

Страница 57: ...ining Enable Disable Read On Die Termination Training Read Equalization Training Enable Disable Read Equalization Training Read Amplifier Training Enable Disable Read Amplifier Training Write Timing C...

Страница 58: ...Memory Configuration Display Memory Configuration MRC ULT Safe Config MRC ULT Safe Config for PO Maximum Memory Frequency Maximum Memory Frequency Selections in Mhz HOB Buffer Size Size to set HOB Buf...

Страница 59: ...VC1 Read Metering Threshold threshold of counter within time window Strong Weak Leaker Value for Strong Weak Leaker Memory Scrambler Enable Disable Memory Scrambler Force ColdReset Force ColdReset OR...

Страница 60: ...Card on PEG and PCH PCIE Ports External Gfx Card Primary Display Configuration External Gfx Card Primary Display Configuration Internal Graphics Keep IGFX enabled based on the setup options GTT Size S...

Страница 61: ...ic Phase Eq Program Phase1 Preset CTLEp Gen3 Root Port Preset value for each Lane Lane 0 Value for Lane 0 Lane 1 Value for Lane 1 Lane 2 Value for Lane 2 Lane 3 Value for Lane 3 Gen3 Endpoint Preset v...

Страница 62: ...t Power Limit Value Sets the upper limit on power supplied by slot PEG1 Slot Power Limit Scale Select the scale used for the slot power limit value PEG1 Physical Slot Number Set the physical slot numb...

Страница 63: ...for Lane 14 Lane 15 Value for Lane 15 Gen3 Endpoint Preset value for each Lane Lane 0 Value for Lane 0 Lane 1 Value for Lane 1 Lane 2 Value for Lane 2 Lane 3 Value for Lane 3 Lane 4 Value for Lane 4 L...

Страница 64: ...Lane5 Bundle3 Gen3 RxCTLE setting for Bundle3 Lane6 Lane7 Bundle4 Gen3 RxCTLE setting for Bundle4 Lane8 Lane9 Bundle5 Gen3 RxCTLE setting for Bundle5 Lane10 Lane11 Bundle6 Gen3 RxCTLE setting for Bun...

Страница 65: ...testing Stop Grant Configuration Automatic Manual stop grant configuration VT d VT d capability CHAP Device B0 D7 F0 Enable Disable SA CHAP Device Thermal Device B0 D4 F0 Enable Disable SA Thermal De...

Страница 66: ...E2 Cp Display PCIE2 Cp PCIE3 Cm Display PCIE3 Cm PCIE3 Cp Display PCIE3 Cp PCIE4 Cm Display PCIE4 Cm PCIE4 Cp Display PCIE4 Cp PCIE5 Cm Display PCIE5 Cm PCIE5 Cp Display PCIE5 Cp PCIE6 Cm Display PCIE...

Страница 67: ...x x 1 2 etc Depends on available port PCI Express Root Port x Control the PCI Express Root Port Topology Identify the SATA topology if it is default or ISATA or Flex or Direct Connect or M2 ASPM Set t...

Страница 68: ...f Swing Enable Disable Transmitter Half Swing Detect Timeout The number of miliseconds reference code will wait for link to exit Detect state for enable ports before assuming there is no device and po...

Страница 69: ...DD Unlock If enabled indicates that the HDD password unlock in the OS is enable LED Locate If enabled indicates that the LED SGPIO hardware is attached and ping to locate feature is enable on the OS A...

Страница 70: ...logy if it is default or ISATA or Flex or Direct Connect or M2 SATA Port1 DevSlp Enable Disable SATA Port1 DevSlp DITO Configuration Enable Disable DITO Configuration DITO Value Display DITO Value DM...

Страница 71: ...t or M2 SATA Port3 DevSlp Enable Disable SATA Port3 DevSlp DITO Configuration Enable Disable DITO Configuration DITO Value Display DITO Value DM Value Display DM Value SATA6 J11 Software Preserve Unkn...

Страница 72: ...DITO Value DM Value Display DM Value USB Configuration XHCI Disable Compliance Mode Options to disable compliance mode xDCI Support Enable Disable xDCI USB OTG Device USB Port Disable Override Select...

Страница 73: ...tically Switchable BCLK Clock Frequency Configuration HD Audio Link Frequency Select HD Audio Link Frequency iDisplay Link Frequency Select iDisplay Link frequency HD Audio DSP Features Configuration...

Страница 74: ...Disables 3rd Party Processing Module Support identified by GUID Maxim Smart AMP Enables Disables 3rd Party Processing Module Support identified by GUID FortMedia SAMSoft Enables Disables 3rd Party Pr...

Страница 75: ...dentified by GUID Serial IO Configuration I2C0 Controller Enables Disables Serial IO Controller I2C1 Controller Enables Disables Serial IO Controller I2C2 Controller Enables Disables Serial IO Control...

Страница 76: ...UART Test Device Choose if UART Test Device is used and with which controller Additional Serial IO devices When enabled ACPI will report additional devices connected to Serial IO SerialIO timing param...

Страница 77: ...integrated LAN to wake the system SLP_LAN Low on DC Power Enable Disable SLP_LAN Low on DC Power K1 off Enable Disable K1 off feature CLKREQ Wake on WLAN and BT Enable Enable Disable PCI Express Wirel...

Страница 78: ...4 Security Setup Menu The Security Setup menu provides information about the passwords and functions for specifying the security settings The passwords are case sensitive Table 34 Security Setup Menu...

Страница 79: ...de secure boot variables can be configured without authentication Key Management Provision Factory Defaults Allow to provision factory default secure boot keys when system is in setup mode Install Fac...

Страница 80: ...andling changes made to the UEFI BIOS settings and the exiting of the Setup program Table 36 Save Exit Setup Menu Functions Function Description Save Changes and Exit Exit system setup after saving th...

Страница 81: ...responsible for any loss or damage caused to the equipment received without an RMA number The buyer accepts responsibility for all freight charges for the return of goods to Kontron s designated faci...

Страница 82: ...d ESD protection Goods returned to Kontron Europe GmbH in non proper packaging will be considered as customer caused faults and cannot be accepted as warranty repairs 4 Include the RMA Number with the...

Страница 83: ...C Error Checking and Correction FRU Field Replaceable Unit GPU Graphics Processing Unit HD Hard Disk mITX Mini ITX PCIe PCI Express PECI Platform Environment Control Interface RTC Real Time Clock TPM...

Страница 84: ...tailor made solutions based on highly reliable state of the art embedded technologies Kontron provides secure and innovative applications for a variety of industries As a result customers benefit fro...

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