Schematic Diagram
10-18
Samsung Electronics
R851 delete
E
T
E
L
E
D
0
8
0
1
R
R
O
T
C
E
N
N
O
C
4
9
3
1
5
4
2
X
C
L
4
7
1
9
6
R
K
0
1
W
6
1
/
1
V
5
.
1
_
4
9
3
1
SUPLVAL
TP6
10uF
C49
16V
V
5
2
V
0
5
F
n
0
1
8
4
C
8
3
1
1
C
F
n
0
0
1
7
4
C
V
3
.
3
D
M
F
u
0
0
1
V
6
1
1
G
E
R
5
1
1
2
7
S
P
T
0
6
1
1
C
V
6
1
F
u
0
0
1
V
5
2
2
8
C
F
n
0
0
1
W
6
1
/
1
K
7
.
4
0
9
0
9
R
V
5
2
F
n
0
0
1
4
3
C
V
5
2
F
n
0
0
1
3
4
0
1
C
8
4
0
1
L
A
1
2
1
R
2
1
0
2
Z
M
M
8
6
R
0
0
1
W
6
1
/
1
1
7
R
6
1
1
1
R
2
2
W
6
1
/
1
W
6
1
/
1
2
2
6
3
4
1
2
0
7
R
2
2
W
6
1
/
1
1/16W
22
RA1010
7
8
5
7
8
5
6
3
4
1
2
3
4
1
2
XREF
RA1016
22
1/16W
W
6
1
/
1
2
2
3
8
0
1
A
R
7
8
5
6
3
2
A
3
A
4
4
A
5
5
A
6
7
6
A
7
A
8
8
A
9
XREF
5
B
5
1
4
B
3
B
6
1
2
B
7
1
1
B
8
1
E
O
/
9
1
1
A
2
0
2
C
C
V
X
C
T
M
5
4
2
X
C
L
4
7
0
4
0
1
C
I
1
R
I
D
0
1
D
N
G
8
B
1
1
7
B
2
1
6
B
3
1
4
1
16V
XREF
XREF
C1464
10uF
V
5
2
F
n
0
0
1
2
6
4
1
C
6
7
8
MGND1
MGND2
MGND3
MGND4
V
5
2
F
n
0
0
1
3
6
4
1
C
CN1
YKF45-5004N
1
2
3
4
5
V
5
.
1
_
4
9
3
1
7
L
A
1
2
1
R
2
1
0
2
Z
M
M
V
3
.
3
D
M
0
8
0
1
C
F
n
0
0
1
V
5
2
V
5
2
F
n
0
0
1
3
2
1
1
C
5
2
1
1
C
F
n
0
0
1
V
5
2
8
2
1
1
C
V
5
2
F
n
0
0
1
9
7
0
1
C
V
5
2
F
n
0
0
1
V
5
2
F
n
0
0
1
8
8
0
1
C
9
8
0
1
C
F
n
0
0
1
V
5
2
9
2
1
1
C
F
n
0
0
1
V
5
2
L1012
MMZ2012R121A
F
n
0
0
1
4
2
1
1
C
A
1
2
1
R
2
1
0
2
Z
M
M
0
1
0
1
L
V
5
2
K
0
1
W
6
1
/
1
1
3
1
1
C
F
n
0
0
1
V
5
2
SUPLVAL
TP5
1
6
0
1
R
390Kohm
TP3
SUPLVAL
1
SUPLVAL
TP4
1
1/10W
R1034
m
h
o
0
W
0
1
/
1
1/16W
4.7K
R1079
0
8
0
1
R
2
8
0
1
R
K
7
.
4
W
6
1
/
1
6.34Kohm
R1078
1/10W
W
6
1
/
1
0
0
1
7
6
R
4
7
R
K
7
.
4
W
6
1
/
1
2
7
R
K
7
.
4
W
6
1
/
1
1
2
R1124
47
1/16W
0
2
0
1
A
R
7
4
W
6
1
/
1
7
8
5
6
3
4
1/16W
22
R73
7
8
5
6
3
4
1
2
7
6
A
7
A
8
8
A
9
1
1
0
1
A
R
2
2
W
6
1
/
1
1
B
8
1
E
O
/
9
1
2
1
A
0
2
C
C
V
3
2
A
3
A
4
4
A
5
5
A
6
0
1
D
N
G
8
B
1
1
2
1
7
B
6
B
3
1
5
B
4
1
5
1
4
B
3
B
6
1
2
B
7
1
X
C
T
M
5
4
2
X
C
L
4
7
4
0
0
1
C
I
1
R
I
D
W
6
1
/
1
W
6
1
/
1
K
7
.
4
6
6
3
R
2
6
0
3
1
R
K
7
.
4
7
8
5
6
3
4
1
8
5
6
3
4
1
2
7
4
W
6
1
/
1
8
9
0
1
A
R
2
7
4
W
6
1
/
1
6
9
0
1
A
R
7
7
9
0
1
A
R
W
6
1
/
1
7
4
7
8
5
6
3
4
1
7
8
5
6
3
4
1
2
1
2
W
6
1
/
1
2
2
4
8
0
1
A
R
2
8
0
1
A
R
7
8
5
6
3
4
7
8
5
6
3
4
1
2
2
2
W
6
1
/
1
8
7
A
8
A
9
7
4
W
6
1
/
1
3
1
0
1
A
R
1
B
9
1
E
O
/
1
A
2
C
C
V
0
2
2
A
3
4
3
A
5
4
A
6
5
A
6
A
7
1
1
8
B
7
B
2
1
3
1
6
B
5
B
4
1
4
B
5
1
6
1
3
B
2
B
7
1
8
1
9
8
A
1
4
0
1
C
I
X
C
T
M
5
4
2
X
C
L
4
7
1
R
I
D
D
N
G
0
1
1
A
2
C
C
V
0
2
2
A
3
4
3
A
4
A
5
6
5
A
6
A
7
8
7
A
7
B
2
1
3
1
6
B
5
B
4
1
4
B
5
1
3
B
6
1
2
B
7
1
8
1
1
B
9
1
E
O
/
1
0
0
1
C
I
X
C
T
M
5
4
2
X
C
L
4
7
1
R
I
D
D
N
G
0
1
1
1
8
B
6
5
R
K
7
.
4
W
6
1
/
1
5
5
R
K
7
.
4
W
6
1
/
1
5
8
0
1
C
F
n
0
0
1
V
5
2
V
5
2
F
n
0
0
1
1
8
0
1
C
2
8
0
1
C
F
n
0
0
1
V
5
2
V
5
2
F
n
0
0
1
3
8
0
1
C
V
3
.
3
D
M
1
1
0
1
L
A
1
2
1
R
2
1
0
2
Z
M
M
1
8
0
1
R
7
3
0
1
R
K
7
.
4
W
6
1
/
1
7
0
1
R
W
6
1
/
1
K
7
.
4
W
6
1
/
1
0
0
1
7
7
0
1
R
R1115
100
1/16W
W
6
1
/
1
0
0
1
4
1
1
1
R
R1076
33
1/16W
V
5
2
F
n
0
0
1
6
2
1
1
C
W
6
1
/
1
3
3
V
5
2
F
n
0
0
1
7
2
1
1
C
0
3
1
1
C
F
n
0
0
1
V
5
2
4
8
0
1
C
F
n
0
0
1
V
5
2
V
5
2
F
n
0
0
1
7
8
0
1
C
6
8
0
1
C
F
n
0
0
1
V
5
2
V
5
2
F
n
0
0
1
0
9
0
1
C
V
3
.
3
D
M
A
1
2
1
R
2
1
0
2
Z
M
M
7
1
0
1
L
6
3
0
1
C
F
p
2
2
V
0
5
O
M
1
X
)
z
H
M
6
7
5
.
4
2
(
H
5
M
S
/
9
4
-
C
H
0
Q
1
Q
O
M
V
0
5
F
p
2
2
7
3
0
1
C
PCI_AD[11]
P6
PCI_AD[7]
P7
]
3
[
D
A
_
I
C
P
8
P
JTAG_TCK
P9
DGND
P11
0
D
_
2
I
D
S
H
2
1
P
z
D
I
L
A
V
D
_
2
I
D
S
H
3
1
P
VDD3.3
P14
2
P
n
P
O
T
S
_
I
C
P
PCI_AD[15]
P3
n
R
R
E
S
_
I
C
P
4
P
PCI_AD[13]
P5
DGND
N4
n
R
R
E
P
_
I
C
P
5
N
PCI_AD[12]
N6
PCI_AD[8]
N7
]
1
[
D
A
_
I
C
P
8
N
JTAG_TRSTn
N9
n
L
E
S
V
E
D
_
I
C
P
1
P
0
O
I
P
G
0
1
P
n
Y
D
R
I
_
I
C
P
1
N
n
T
E
S
E
R
0
1
N
z
C
N
Y
S
_
2
I
D
S
H
1
1
N
z
R
O
R
R
E
_
2
I
D
S
H
2
1
N
5
.
1
D
D
V
3
1
N
3
O
I
P
G
4
1
N
5
.
1
D
D
V
2
N
5
.
1
D
D
V
3
N
n
E
M
A
R
F
_
I
C
P
2
M
n
Y
D
R
T
_
I
C
P
3
M
R
R
A
P
_
I
C
P
4
M
PCI_AD[14]
M5
PCI_AD[9]
M6
DGND
M7
PCI_AD[5]
M8
VDD3.3
M9
]
2
[
D
A
_
I
C
P
8
L
JTAG_TMS
L9
n
2
E
B
/
C
_
I
C
P
1
M
DSSClk27
M10
1
1
M
z
K
L
C
_
2
I
D
S
H
5
.
1
D
D
V
2
1
M
2
O
I
P
G
3
1
M
4
O
I
P
G
4
1
M
z
R
O
R
R
E
_
1
I
D
S
H
3
1
L
z
D
I
L
A
V
D
_
1
I
D
S
H
4
1
L
VDD3.3
L2
PCI_AD[16]
L3
DGND
L4
n
1
E
B
/
C
_
I
C
P
5
L
PCI_AD[10]
L6
PCI_AD[6]
L7
n
0
E
B
/
C
_
I
C
P
6
K
]
4
[
D
A
_
I
C
P
7
K
]
0
[
D
A
_
I
C
P
8
K
JTAG_TDI
K9
PCI_AD[17]
L1
JTAG_TDO
L10
1
O
I
P
G
1
1
L
z
K
L
C
_
1
I
D
S
H
2
1
L
VDD3.3
K11
z
C
N
Y
S
_
1
I
D
S
H
2
1
K
DGND
K13
7
D
_
1
I
D
S
H
4
1
K
PCI_AD[18]
K2
PCI_AD[19]
K3
PCI_AD[22]
K4
VDD3.3
K5
PCI_AD[24]
J4
VDD3.3
J5
N/A
J6
N/A
J7
J8
N/A
N/A
J9
PCI_AD[20]
K1
REF_SYT
K10
PCI_AD[23]
J1
3
D
_
1
I
D
S
H
0
1
J
DIV_VCO
J11
6
D
_
1
I
D
S
H
2
1
J
5
D
_
1
I
D
S
H
3
1
J
4
D
_
1
I
D
S
H
4
1
J
PCI_AD[21]
J2
L
E
S
D
I
_
I
C
P
3
J
PCI_AD[25]
H2
PCI_AD[28]
H3
n
3
E
B
/
C
_
I
C
P
4
H
PCI_AD[26]
H5
N/A
H6
N/A
H7
N/A
H8
N/A
H9
N/A
G8
N/A
G9
PCI_AD[27]
H1
T
U
O
_
8
5
9
0
6
0
1
H
2
D
_
1
I
D
S
H
1
1
H
0
D
_
1
I
D
S
H
2
1
H
1
D
_
1
I
D
S
H
3
1
H
DGND
H14
z
K
L
C
_
0
I
D
S
H
3
1
G
z
R
O
R
R
E
_
0
I
D
S
H
4
1
G
n
T
N
G
_
I
C
P
2
G
PCI_AD[30]
G3
4
G
n
T
S
O
H
_
T
E
S
E
R
DGND
G5
N/A
G6
N/A
G7
N/A
F6
N/A
F7
N/A
F8
N/A
F9
PCI_AD[29]
G1
z
C
N
Y
S
_
0
I
D
S
H
0
1
G
z
D
I
L
A
V
D
_
0
I
D
S
H
1
1
G
N
I
_
8
5
9
0
6
2
1
G
7
D
_
0
I
D
S
H
1
1
F
6
D
_
0
I
D
S
H
2
1
F
DGND
F13
VCO_CLK
F14
)
n
T
N
I
_
F
I
C
M
(
n
A
T
N
I
_
I
C
P
2
F
3
.
3
D
D
V
3
F
K
L
C
_
I
C
P
4
F
PCI_AD[31]
F5
5
.
1
D
D
V
4
E
N/A
E5
P
0
B
P
T
6
E
N
0
B
P
T
7
E
WAKEUP
E8
MCIF_SEL0
E9
n
Q
E
R
_
I
C
P
1
F
5
D
_
0
I
D
S
H
0
1
F
XI
E1
8
O
I
P
G
0
1
E
4
D
_
0
I
D
S
H
1
1
E
3
D
_
0
I
D
S
H
2
1
E
3
1
E
1
D
_
0
I
D
S
H
2
D
_
0
I
D
S
H
4
1
E
XO
E2
5
.
1
D
D
V
3
E
AVdd3.3
D2
NO_CONNECT
D3
DGND
D4
0
S
A
I
B
P
T
5
D
DGND
D6
AVdd3.3
D7
BIASDIS
D8
TEST_MODE
D9
n
K
N
I
L
_
T
E
S
E
R
8
C
n
1
H
C
_
K
C
A
A
M
D
9
C
PLLVDD1.5
D1
n
1
H
C
_
Q
E
R
A
M
D
0
1
D
K
C
R
L
_
C
A
D
1
1
D
K
C
B
_
C
A
D
2
1
D
A
T
A
D
_
C
A
D
3
1
D
0
D
_
0
I
D
S
H
4
1
D
5
.
1
D
D
V
3
1
C
3
.
3
D
D
V
4
1
C
NO_CONNECT
C2
NO_CONNECT
C3
N
1
A
P
T
4
C
N
1
B
P
T
5
C
AVdd3.3
C6
0
1
O
I
P
G
7
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P
0
A
P
T
6
B
CPS
B7
3
.
3
D
D
V
8
B
9
O
I
P
G
9
B
PLLVSS
C1
DGND
C10
PHY_TEST_MODEn
C11
5
.
1
D
D
V
2
1
C
5
O
I
P
G
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DGND
B12
K
C
M
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C
A
D
3
1
B
E
T
U
M
_
O
I
D
U
A
4
1
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DGND
B2
P
1
A
P
T
3
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P
1
B
P
T
4
B
DGND
B5
NO_CONNECT
A4
AVdd3.3
A5
N
0
A
P
T
6
A
CN
A7
PHYHCLK
A8
PHY8CLK
A9
R0
B1
n
0
H
C
_
Q
E
R
A
M
D
0
1
B
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6
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7
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NO_CONNECT
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S
A
I
B
P
T
3
A
1
8
C
I
2
4
A
D
3
4
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S
T
SUPLVAL
TP2
1
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SUPLVAL
W
6
1
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1
0
0
1
2
5
R
W
6
1
/
1
4
5
R
0
0
1
0
5
R
W
6
1
/
1
0
0
1
3
5
R
R1035
5.1Kohm
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6
1
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1
0
0
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0
0
1
W
6
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1
8
4
R
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4
5
6
7
8
2
4
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F
n
0
0
1
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5
2
4
1
0
1
A
R
W
6
1
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1
7
4
1
2
3
2
1
0
1
A
R
7
8
5
6
3
4
1
2
5
5
A
6
7
6
A
7
A
8
8
A
9
W
6
1
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1
7
4
6
1
7
1
2
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8
1
1
B
E
O
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9
1
2
1
A
0
2
C
C
V
2
A
3
3
A
4
4
A
R
I
D
1
0
1
D
N
G
8
B
1
1
2
1
7
B
6
B
3
1
5
B
4
1
5
1
4
B
3
B
3
4
1
2
X
C
T
M
5
4
2
X
C
L
4
7
0
0
0
1
C
I
6
0
0
1
A
R
W
6
1
/
1
2
2
7
8
5
6
7
8
5
6
3
4
1
26
3
4
1
2
4
0
0
1
A
R
2
2
W
6
1
/
1
W
6
1
/
1
2
2
5
0
0
1
A
R
7
8
5
1
5
R
W
6
1
/
1
2
.
6
5
O
M
V
0
5
F
n
7
2
.
0
1
4
0
1
C
9
4
R
V
0
1
F
u
1
0
4
0
1
C
2
.
6
5
W
6
1
/
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.
6
5
W
6
1
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1
7
4
R
O
M
4
5
4
R
W
6
1
/
1
2
.
6
5
4
L
1
2
3
3
L
1
2
3
4
9
3
0
1
C
F
n
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2
.
0
4
4
R
V
0
5
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M
3
4
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W
6
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6
5
W
6
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3
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M
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6
5
W
6
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6
5
1
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1
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W
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1
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
)
0
:
7
(
A
T
A
D
_
V
D
DV_DATA(0)
DV_DATA(1)
DV_DATA(2)
DV_DATA(3)
DV_DATA(4)
DV_DATA(5)
DV_DATA(6)
DV_DATA(7)
DV_CLK
DV_SYNC
DV_VALID
R
I
D
_
B
4
9
3
1
N
E
_
C
4
9
3
1
n
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L
V
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C
S
S
T
C
N
Y
S
_
C
S
S
T
K
L
C
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S
T
0
D
D
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C
S
S
T
R
R
E
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C
S
S
T
R
I
D
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C
4
9
3
1
R
I
D
_
C
4
9
3
1
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD5
PCI_AD6
1
E
B
C
n
_
I
C
P
0
E
B
C
n
_
I
C
P
4
D
A
_
I
C
P
3
D
A
_
I
C
P
2
D
A
_
I
C
P
1
D
A
_
I
C
P
0
D
A
_
I
C
P
27M_1394
N
E
_
C
4
9
3
1
n
R
I
D
_
A
4
9
3
1
N
E
_
B
4
9
3
1
n
0
D
D
_
B
S
S
T
1
D
D
_
B
S
S
T
2
D
D
_
B
S
S
T
3
D
D
_
B
S
S
T
4
D
D
_
B
S
S
T
5
D
D
_
B
S
S
T
6
D
D
_
B
S
S
T
7
D
D
_
B
S
S
T
C
N
Y
S
_
B
S
S
T
D
L
V
_
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S
S
T
K
L
C
_
B
S
S
T
R
R
E
_
B
S
S
T
DV_READY
B
T
N
I
n
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I
C
P
1
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E
R
n
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I
C
P
2
T
U
O
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L
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n
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n
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D
R
T
n
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I
C
P
1
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A
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R
E
P
n
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C
P
N
E
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4
9
3
1
n
0
D
D
_
A
S
S
T
1
D
D
_
A
S
S
T
2
D
D
_
A
S
S
T
3
D
D
_
A
S
S
T
4
D
D
_
A
S
S
T
5
D
D
_
A
S
S
T
6
D
D
_
A
S
S
T
7
D
D
_
A
S
S
T
C
N
Y
S
_
A
S
S
T
D
L
V
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T
K
L
C
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A
S
S
T
R
R
E
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S
S
T
T
S
R
_
K
N
I
L
_
4
9
3
1
R
I
D
_
A
4
9
3
1
N
E
_
A
4
9
3
1
n
R
I
D
_
B
4
9
3
1
N
E
_
B
4
9
3
1
n
10-2-9 DTV Module-9
This Document can not be used without Samsung’s authorization.
Содержание SP42L6HN
Страница 9: ...1 6 Samsung Electronics MEMO ...
Страница 15: ...2 6 Samsung Electronics MEMO ...
Страница 36: ...Samsung Electronics 5 2 MEMO ...
Страница 54: ...7 6 Samsung Electronics MEMO ...
Страница 55: ...Wiring Diagram Samsung Electronics 8 1 8 Wiring Diagram 8 1 Overall Wiring Front LED ...
Страница 56: ...Wiring Diagram 8 2 Samsung Electronics 8 2 Connection between Analog and Digital Board ...
Страница 66: ...9 10 Samsung Electronics MEMO ...
Страница 102: ...Schematic Diagram 10 36 Samsung Electronics 10 5 Ballast This Document can not be used without Samsung s authorization ...
Страница 116: ...9 10 Samsung Electronics MEMO ...
Страница 127: ...Disassembly Reassembly Samsung Electronics 12 5 Part Name Description Description Photo Digital Board Digital Board ...
Страница 136: ...12 14 Samsung Electronics MEMO ...