SpinPoint P80 Product Manual Rev. 01
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6.6.4 DMA Data Transfer Commands
This class comprises:
•
Read DMA (C8h)
•
Write DMA (C9h)
Data transfers using DMA commands differ in two ways from PIO transfers:
•
Data transfers are performed using the slave-DMA channel,
•
No intermediate sector interrupts are issued on multi-sector commands.
Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands except
that the host initializes the slave-DMA channel prior to issuing the command.
The interrupt handler for DMA transfers is different in that:
•
No intermediate sector interrupts are issued on multi-sector commands,
•
The host resets the DMA channel prior to reading status from the drive.
The DMA protocol allows a high performance, multi-tasking operating system to eliminate processor
overhead associated with PIO transfers.
a) Command phase
1) Host initializes the slave-DMA channel.
2) Host updates the Command Block registers.
3) Host writes command code to the Command register.
b) Data phase. The register contents are not valid during a DMA data Phase.
1) The slave-DMA channel qualifies data transfers to and from the drive with DMARQ.
c) Status phase
1) Drive generates the interrupt to the host.
2) Host resets the slave-DMA channel.
3) Host reads the Status register and Error register.
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