RDS DEMODULATOR IC
S1A0905
3
Preliminary
PIN CONFIGURATION
PIN DESCRIPTIONS
I: Input pin, O: Output pin, P: Power pin
Pin
Name
I/O
Description
1
QUAL
O
Output for data quality indication (High = good data Low = bad data)
2
DATAO
O
RDS data output
3
VREF
O
System reference voltage output (2.5V)
4
MUX
I
Composite signal input
5
VDDA
P
Analog power (+5.0V)
6
VSSA
P
7
SGND
P
System ground
8
COMP
O
Bandpass filter output
9
TEST
I
Test enable selecton pin (High = Test mode, Low = Normal mode)
10
TIN
I
Input signal for Test mode (Normally ground or open)
11
VSS
P
Digital power(+5.0V)
12
VDD
P
13
XOSCI
I
Xtal oscillator input
14
XOSCO
O
Xtal oscillator output
15
RSTB
I
Input for system reset (High = active mode, Low = reset mode)
16
CLKO
O
RDS clock output (1187.5Hz)
QUAL
DATAO
VREF
MUX
VDDA
VSSA
SGND
COMP
SEC
S1A0905X01
TEST
TIN
VSS
VDD
XOSCI
XOSCO
RSTB
CLKO
16 SOP
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
