Samsung PL-42P7HP, Руководство по обслуживанию

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Block Diagram
Samsung Electronics 7-1
7. Block Diagram
7-1 Overall Block Diagram
1024× 768 Pixels
1024× 3× 768 Cells
YP
u
ls
e
Ge
n
e
ra
to
r
Ro
w
Dri
v
e
r
Vs Va
Vcc
Vsync
Enable
Hsync
DCLK
DRA
M
Display
Data
Dri
v
e
r
Ti
m
in
g
C
o
n
tro
lle
r
Driver
Timing
Scan
Timing
3V3
DATA_R
8Bits
Column Driver
Reference
- 3V3 : Voltage for Logic Control
- Vcc : Voltage for FET driver
- Va
: Voltage for address pulse
- Vs : Voltage for sustain pulse
- Vsc : Voltage for scan pulse
- Ve
: Voltage for X ramp pulse
- Vset : Voltage for Y ramp pulse
LOGIC CONTROL
DRIVER CIRCUIT & PANEL
DATA_G
8Bits
DATA_B
8Bits
In
p
u
t
D
a
ta
Pr
o
c
e
s
s
o
r
Da
ta
Co
n
tro
lle
r
XP
u
ls
e
Ge
n
e
ra
to
r
Vset Vsc Ve
LVDS
Interface
VSYNC
DEN
DCLK
R-Data
8,10,12 or 13Bits
G-Data
8,10.12 or 13Bits
B-Data
8,10,12 or 13Bits
HSYNC
Micom
Image
Video Decoder
AC Power
Source
100~240V