Samsung MAX-DN55, Руководство по обслуживанию

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Reference Information
9-8 Samsung Electronics
9-1-5 DIC2 (KM416C254BJ-6 ; CMOS DRAM)
N A M E
A 0 - A 8
D Q 0 - 1 5
VSS
R A S
UCAS
L C A S
W
O E
V
CC
N . C
BLOCK DIAGRAM
Control
Clocks
VBB Generator
Lower
Data in
Buffer
DQ0
to
DQ7
OE
DQ8
to
DQ15
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
Vcc
Vss
RAS
UCAS
LCAS
W
FUNCTION
A d d r e s s I n p u t s
D a t a i n / O u t
Ground
Row Address Strobe
Upper Column Address Strobe
Lower Column Address Strobe
R e a d / W r i t e I n p u t
D a t a O u t p u t E n a b l e
P o w e r ( + 5 V )
P o w e r ( + 3 . 3 V )
No Connection
Refresh Timer
Refresh Control
AO
.
.
A8
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Column Decoder
Memory Array
262,144 x 16
Cells