RTD Embedded Technologies, Inc.
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22
GPS35190 User’s Manual
6
Functional Description
6.1
Block Diagram
The Figure below shows the functional block diagram of the GPS35190. The various parts of the block diagram are discussed in the following
sections.
Figure 8: GPS35190 Block Diagram
6.2
GPS Interface
The GPS35190 is a carrier board for a Trimble GPS receiver. It provides a octal UART interface to the PCIe bus that can be connected to all
three serial ports of the GPS and serial connector CN7. Optionally, one of the GPS serial ports can be connected to CN7. If the GPS module
has CAN bus capability on the third serial port, it can be connected to an onboard CAN transceiver. The GPS antenna connects directly to the
GPS module.
6.2.1
PCI
E
O
CTAL
UART
The GPS35190 provides eight independent UARTs. By default they are connected as follows:
•
UART 1 to GPS COM1
•
UART 2 to GPS COM2
•
UART 3 to GPS COM3
•
UART 4 to serial port connector CN7
•
UART 5, UART 6, UART 7 and UART 8 are unused.
Jumper JP1 and JP2 selection may disable some of these ports to allow the GPS COM ports to connect to serial connector CN7 or CAN
connector CN5. Refer to
on page 12.
6.2.2
DTR
GPS
R
ESET
The DTR signal of the first UART is used to generate a GPS reset signal. A reset pulse will be generated when the DTR signal transition from
asserted to de-asserted (MCR bit 0 transitions from 1 to 0). JP7 needs set to 1-2 to enable this function.
PC
Ie
Bu
s
EPLD
Trimble GPS
PCIe
Octal
UART
CN4: Ethernet
Power LED
PCIe x1
RTK LED
SAT LED
CN7: Serial
CN6: Utility
CN3: USB
GPS Antenna
CN5: CAN
