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46
DM34216HR
User’s Manual
BDM-610010056 Rev A
6.5.5
STOP_TRIG
(R
EAD
/W
RITE
)
Selects the stop trigger from the clock bus.
Refer to
section above, for list of valid values.
6.5.6
CLK_DIV
(R
EAD
/W
RITE
)
Divider for the pacer clock. Pacer Clock Frequency = (Clk_Src_Frequency) / (1 + CLK_DIV). If synchronizing with the pacer clock from
another Function Block (by using one of the CLK_BUS signals), this is typically set to 0.
6.5.7
CLK_DIV_CNTR
(R
EAD
O
NLY
)
The current value of the Clock Divide Counter. This counter starts at a value of CLK_DIV and counts down. When it reaches zero, a sample is
taken. This is useful when using a slow sample clock.
6.5.8
PRE_START_COUNT
(R
EAD
/W
RITE
)
Number of samples to collect before the Start Trigger. The length is limited by the FIFO size
–
writing a value larger than the FIFO size will
have indeterminate results.
6.5.9
POST_STOP_COUNT
(R
EAD
/W
RITE
)
Number of samples to collect after the Stop Trigger.
6.5.10
SAMPLE_CNT
(R
EAD
O
NLY
)
Total number of samples collected. This does not increment in while in the “Waiting For Start Trigger” state. It also conti
nues counting after a
Re-Arm.
6.5.11
INT_ENA
(M
ASKABLE
R
EAD
/W
RITE
)
Each bit corresponds to an interrupt source. A
value of ‘1’ enables the source, and a value of ‘0’ disables it. See below for a description of the
sources.
6.5.12
INT_STAT
(R
EAD
/C
LEAR
)
Each bit corresponds to an interrupt source. Reading a value of ‘1’ indicates that an event has occurred. Reading a value of ‘0’ indicates that
the event has not occurred. Writing a ‘1’ will clear that bit.
B0: Sample
–
A sample has been taken.
B1: Advanced Interrupt
–
Interrupt generated from advanced interrupt mode.
B2: Pre-Start Buffer Filled
B3: Start Trigger
B4: Stop Trigger
B5: Post-Stop Buffer Filled
B6: Sampling has completed, and the FIFO is empty (all data transferred to host)
B7: Pacer
–
The pacer clock has ticked.
B8: Reserved
B9: Reserved
B10: Strobe
–
Positive edge detected (Must have strobe enable,MODE_CONFIG
(Strobe) = ‘1’)
6.5.13
CLK_BUS
N
Selects a source to drive onto Clock Bus N. That clock bus can then be used by a different function block as a clock source or trigger.
A function block can drive multiple different Clock Buses. However, a Clock Bus N should not be driven by more than one function block at the
same time or the clock signal will be undefined.