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TO-247N(-4L) Half-Bridge Evaluation Board
User’s Guide
© 2022 ROHM Co., Ltd.
No. 63UG059J Rev.001
2022.2
9.3 Boost power supply circuit
Figure 18 shows the boost operation test circuit in which the L-side MOSFET is switched.
Figure 18 Operation test circuit based on boost circuit
First, prepare a pulse generator and connect the CLK signal to the IN_L_CLK pin (CN101 pin 1). Connect the 12 V power
supply for control to the Vcc pin (CN201), the load inductance to the Vsw pin (T2), the high-voltage HVdc power supply to the
load inductance, and the electronic load to the HVdc pin (T1) as shown in Figure 17. The HVdc side is the output, and since the
output capacitor is mounted on the board, it is basically not necessary. However, if the oscillation frequency is low, it is
recommended to add an appropriate value externally. In this case, ensure that the rated voltage of the capacitor is sufficient.
The operating procedure is as follows.
①
Turn on the +12 V power supply.
②
Set the switching frequency and duty ratio using the pulse generator and input the CLK signal.
③
Turn on the HVdc power supply.
④
Adjust the output current with an electronic load device.
In CCM mode, where the inductor current is continuous, the output voltage will be approximately as follows.
Vout=Vin/(1-Duty)
If the inductor current is discontinuous (output current is small), the output voltage will increase out of proportion to the duty ratio
(output voltage varies with load current). This is because the pulses are not thinned out due to the open-loop control, but since
the output voltage reaches several tens of times the input voltage, care must be taken to gradually increase the input voltage
while keeping track of the output voltage value. When increasing the load current, pay attention to the heat generation of the
evaluation device, and if necessary, install a heat sink capable of sufficient cooling or consider the ambient temperature.
Pulse
Generator
(+5V output)
PGND
HVdc
DUT_HS
DUT_LS
HS-GADJ
LS-GADJ
IN_H_CLK
IN_L_CLK
LDO
Vcc1
DCR
Vsw
Vcc
ICAP
SNB
SGND
PGND
PGND
PGND
PGND
SGND
HS_GD
PRIMERY
SECONDERY
BD7F200
HS
Gate Power
LS_GD
LS
Gate Power
BM61M41
BD7F200
BM61M41
VEE2
VCC2
VEE2
VCC2
Vcc1
HS_GSC
LS_GSC
UVLO2
UVLO2
RCD-SNB
RCD-SNB
HS-
VEESEL
LS-
VEESEL
SGND
VEE2
GND2
GND2
UVLO
UVLO1
UVLO
UVLO1
LS_CS
Load