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RB-S22660GD32

 User’s Manual

 

FEBL22660GDRB 

3

 

3.6.  SP jack 

SP jack is a jack where the signal from SPP,SPM pins of Speech Synthesis LSIs is output. 

Set Mode of Play setting of SDCB Controller to Speaker AMP. (Refer to Speech LSI Utility User's Manual.) 

Connect a monaural speaker. 

 

 

3.7.  AIN through hall 

AIN through hole is used to input signals from an external source to the AIN pin of Speech Synthesis LSIs. 

Input the speaker amplifier input signal to AIN through hole. 

 

 

Figure 2 AIN through hall 

 

 

3.8.  SPVDD jumper terminal, EXT through hall 

SPVDD jumper terminal is used to switch the destination of SPVDD pins of Speech Synthesis LSIs. 

When supplying from SDCB3, connect 1-2pin of SPVDD jumper terminal. 

To supply from an external source, cut the pattern between 1 and 2 pins of SPVDD jumper terminal and input SPVDD from 

the EXT throughhole. 

 

 

Figure 3 SPVDD jumper terminal 

 

 

3.9.  SAD2-0 lands 

SAD2-0 lands are used to change SAD2-0 setting of Speech Synthesis LSIs. 

This board is shipped to DVDD (I2C slave address is 111_101). 

When connecting this board to SDCB3 and using it, set DVDD to the factory default settings. 

To set any I2C slave address, change the connection of SAD2-0 lands. 

 

Cut this when cutting the 1-2-pin   

pattern of SPVDD jumper terminal.

 

Speech Synthesis LSIs 

Содержание LAPIS RB-S22660GD32

Страница 1: ...FEBL22660GDRB 02 RB S22660GD32 User s Manual Issue Date February 5 2021...

Страница 2: ...ghts owned by third parties arising out of the use of such technical information 5 The Products are intended for use in general electronic equipment AV OA devices communication consumer systems gaming...

Страница 3: ...r pin 2 3 2 OE jumper pin 2 3 3 IOVDD jumper pin 2 3 4 OUT jumper pin 2 3 5 LOUT jack 2 3 6 SP jack 3 3 7 AIN through hall 3 3 8 SPVDD jumper terminal EXT through hall 3 3 9 SAD2 0 lands 3 3 10 XT1 la...

Страница 4: ...n loading Speech Synthesis LSIs into the RB S22660GD32 Pin 1 is the position of the board silk at the bottom left with respect to the socket opening The Figure 1 shows the setting directions of Speech...

Страница 5: ...serial flash memory interface signal of Speech Synthesis LSIs and CN2 signal are input output to the serial flash memory when OE jumper pin is set to PRG 3 3 IOVDD jumper pin IOVDD jumper pin is jump...

Страница 6: ...ll SPVDD jumper terminal is used to switch the destination of SPVDD pins of Speech Synthesis LSIs When supplying from SDCB3 connect 1 2pin of SPVDD jumper terminal To supply from an external source cu...

Страница 7: ...that matches XT1 land foot pattern is shown below Vendor Frequency Hz Parts Number Murata Manufacturing Co Ltd 4M CSTCR4M00G55B R0 Murata Manufacturing Co Ltd 4 096M CSTCR4M09G55B R0 J1 land is land c...

Страница 8: ...O 15 1 18 DGND 16 1 18 DGND 17 9 ERCSB O O I 18 10 ERSCK O O I 19 11 ERSI O O O 20 12 ERSO O O I 21 13 EROFF O O I 22 23 14 IOVDD 1 3 O I I 24 25 1 18 DGND 26 1 18 DGND 27 16 XTB 2 O O O 28 17 XT 2 O...

Страница 9: ...22660GDRB 6 4 Appendix 4 1 PCB layout Figure 8 shows the RB S22660GD32 PCB layout Figure 8 PCB layout Do not connect any component part to CN1 Do not connect any components to the CN2 while the RB S22...

Страница 10: ...o Ltd 8 MJ 354A0 JACK1 JACK2 2 Conductor Miniature Jack 2 MARUSHIN ELECTRIC MFG CO LTD 9 MCR03EZPJ203 R1 Resistor 20k 5 1 Rohm Co Ltd 10 MCR03EZPJ103 R2 Resistor 10k 5 1 Rohm Co Ltd 11 MCR03EZPJ104 R3...

Страница 11: ...RB S22660GD32 User s Manual FEBL22660GDRB 8 LAPIS Technology Co Ltd...

Страница 12: ...umber Added SDCB Controller settings when using LOUT jack Added to connect a monaural speaker to the LOUT jack 3 3 6 SP jack Changed chapter number Added SDCB Controller settings when using SP jack Ad...

Страница 13: ...s Manual FEBL22660GDRB 10 4 1 PCB layout Changed chapter number Changed Figure 8 7 4 2 BOM list Schematic Changed chapter number Company name change 8 4 2 BOM list Schematic Changed chapter number Co...

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