Rockwell Automation PowerFlex 700S, Руководство пользователя, Страница: 97 / 318

Programming and Parameters 3-39
PowerFlex 700S Phase II AC Drive User Manual - Publication 20D-UM006G-EN-P – July 2008
257 Opt 0 Regis Ltch
Displays the registration data of the feedback option card port 0. The registration data is the
position reference counter value latched by the external strobes. The strobe signal used to
trigger the latch is configurable by the
Par 254 [Opt0/1 RegisCnfg].
Default:
Min/Max: 0
-/+2147483648 RO 32-bit
Integer
258 Opt 1 Regis Ltch
Displays the registration data of the feedback option card port 0. The registration data is the
position reference counter value latched by the external strobes. The strobe signal used to
trigger the latch is configurable by
Par 254 [Opt0/1 RegisCnfg].
Default:
Min/Max: 0
-/+2147483648 RO 32-bit
Integer
259 Stegmann0 Cnfg
Configures the Stegmann Hi-Resolution Encoder Feedback Option.
•
Bit 5 “Direction” determines counting direction. If clear, direction is forward or up. If set, the direction is reverse or down.
•
Bits 10 “SmplRate bt0” -12 “SmplRate bt2” configure the Finite Impulse Response (FIR) Filter (see Table 259A: FIR Filter Settings ). This setting reduces the
effect of noisy feedback on the system. Refer to the Speed/Position Feedback section of the PowerFlex® 700S with Phase II Control Reference Manual,
publication PFLEX-RM003 for details.
Notes: Bit 11 “SmplRate bt1” is set to 0 = False by default for firmware version 1.11 and is set to 1 = True by default for firmware version 2.03. This parameter was
changed to non-linkable for firmware version 3.01.
260 Stegmann0 Status
Indicates faults on the Stegmann Hi-Resolution Encoder Feedback Option.
•
Bit 8 “Open Wire” indicates an open wire fault.
The feedback option card checks for a pre-determined constant value. If this value is not within tolerances, an open wire fault is declared. A quadrature check
also is done. If an error occurs during the check, the ope wire check is aborted. If 3 quadrature errors occur in succession, the open wire check will complete
and the constant value checked again. If this value is not within tolerances, the fault is declared.
•
Bit 9 “PowerSup Er” indicates the failure of the power supply.
•
Bit 10 “PwrUpDiag Er” indicates the option board failed its power-up diagnostic test.
The pattern on the FPGA must be identical to the pattern written from the DSP, or the board status test will fail.
•
Bit 11 “MsgChksum Er” indicates a message checksum fault.
The check sum associated with the Heidenhain encoder must be correct and acknowledged by the feedback option card.
•
Bit 12 “Time Out Err” indicates a RS-485 time-out fault.
This check requires information to be sent from the encoder to the feedback option card within a specified time. Typical times are about 10 clock cycles before
an error is detected. This check is done only at power-up.
No.
Name
Description
Values
Linkab
le
R
ead-Wr
ite
Da
ta
T
ype
Options
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Smp
lR
ate
bt
2
Smp
lR
ate
bt
1
Smp
lR
ate
bt
0
Re
ser
ved
Re
ser
ved
Re
ser
ved
SW Res
et
Direction Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Default 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 = False
1 = True
Table 259A: FIR Filter Settings
Bit 12 11 10 Taps
0 0 0 1
0 0 1 2
0 1 0 4
0 1 1 8
1 0 0 16
1 0 1 32
1 1 0 64
1 1 1 127
Options
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Ti
me
Ou
t Er
r
Ms
gChk
sum Er
Pw
rUpD
ia
g Er
P
ower
S
up
Er
Op
en W
ire
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Re
ser
ved
Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 = False
1 = True