RME Audio ADI-192 DD, Руководство пользователя

Страница: 26 / 40

26
User's Guide ADI-192 DD © RME
9. Word Clock
9.1 Word Clock Input and Output
Input
The transformer isolated word clock input of the ADI-192 DD is active when WCK has been
selected in the CLOCK SECTION. The signal at the BNC input can be Single, Double or Quad
Speed, the ADI-192 DD automatically adapts to it. As soon as a valid signal is detected, the
WCK LED is lit, else it flashes.
Thanks to RME's
Signal Adaptation Circuit , the word clock input still works correctly even with
heavily mis-shaped, dc-prone, too small or overshoot-prone signals. Thanks to automatic signal
centering, 300 mV (0.3V) input level is sufficient in principle. An additional hysteresis reduces
sensitivity to 1.0 V, so that over- and undershoots and high frequency disturbances don't cause
a wrong trigger.
The word clock input is shipped as high
impedance type (not terminated). A push switch
allows to activate internal termination (75 Ohms).
The switch is found on the back beside the word
clock input socket. Use a small pencil or similar
and carefully push the blue switch so that it snaps
into its lock position. The yellow LED will be lit
when termination is active. Another push will
release it again and de-activate the termination.
Output STD
The word clock output of the ADI-192 DD is constantly active, providing the current sample
frequency as word clock signal. In master mode the word clock will be fixed to 44.1 kHz or 48
kHz (DS x 2, QS x 4). In any other case the sample rate is identical to the one present at the
currently chosen clock input. When the current word clock source fails, the last valid sample
rate will be held automatically.
The received word clock signal can be distributed to other devices by using the word clock out-
put. With this the usual T-adapter can be avoided, and the ADI-192 DD operates as
Signal Re-
fresher . This kind of operation is highly recommended, because
•
input and output are phase-locked and in phase (0°) to each other
•
SteadyClock removes nearly all jitter from the input signal
•
the exceptional input (1 Vpp sensitivity instead of the usual 2.5 Vpp, dc cut, Signal Adapta-
tion Circuit) plus SteadyClock guarantee a secure function even with highly critical word
clock signals
Thanks to a low impedance, but short circuit proof output, the ADI-192 DD delivers 4 Vpp to 75
Ohms. For wrong termination with 2 x 75 Ohms (37.5 Ohms), there are still 3.3 Vpp at the out-
put.
Output TDIF
The signal at the BNC socket labelled TDIF is identical to the signal STD, except for two differ-
ences. First it has a phase shift of 90°, necessary for TDIF interfacing. Second the word clock
output TDIF always operates in Single Speed mode - as does the TDIF interface. So at 96 kHz
and 192 kHz the output will provide a 48 kHz signal.