Renesas RZ/T2M, Руководство пользователя

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Renesas Starter Kit+ for RZ/T2M 5. User Circuitry
R20UT4939EG0100 Rev. 1.00 Page 26 of 87
Apr 20, 2022
Table 5-17: Ethernet Connections (ETH2)
Ethernet signal Function
MPU
Port Pin
ETH2_TXCLK RGMII: Transmit clock output P00_6 D3
ETH2_TXEN RGMII: Transmit data enable / Transmit data error P00_2 B1
ETH2_TXD0 RGMII: Transmit data0 P01_5 F3
ETH2_TXD1 RGMII: Transmit data1 P01_4 H5
ETH2_TXD2 RGMII: Transmit data2 P01_3 D1
ETH2_TXD3 RGMII: Transmit data3 P01_2 D2
ETH2_RXCLK RGMII: Receive clock input P24_1 C3
ETH2_RXDV RGMII: Receive data valid / Receive data error P00_1 F5
ETH2_RXD0 RGMII: Receive data0 P23_7 B3
ETH2_RXD1 RGMII: Receive data1 P24_0 C4
ETH2_RXD2 RGMII: Receive data2 P24_2 E5
ETH2_RXD3 RGMII: Receive data3 P00_0 B2
ETH2_REFCLK Outputs 25MHz clock for EtherPHY2 P00_3 C2
Table 5-18: Ethernet Connections (ETH0/ETH1/ETH2)
Ethernet signal Function
MPU
Port Pin
ETH_MDIO Management data I/O P09_0 T7
ETH2_MDIO Management data I/O P01_0 E3
ETH_MDC Management data clock P08_7 W5
ETH2_MDC Management data clock P01_1 H6
Table 5-19: Default PHY setting
Default PHY setting items Default PHY setting contents
PHY Address
ETH0 (IC35): = 0
ETH1 (IC31): = 1
ETH2 (IC16): = 2
MAC Interface RGMII
Isolate Disable
Speed Depends auto negotiation
Duplex Full-Duplex
Auto negotiation Enable