RSK+RZA1H
5. User Circuitry
R20UT3007EG0200 Rev. 2.00
Page 31 of 53
May 17, 2015
5.19
LVDS
The RSK+ board provides an LVDS interface, from connector CN17. Connection details to the MCU are
described in Table 5.21.
Connector
CN17 Pin
Signal
Function
MCU
Port
Pin
1
BOARD_VCC
3,3V Power supplied to external display
N/A
N/A
2
BOARD_VCC
3,3V Power supplied to external display
N/A
N/A
3
GROUND
GROUND connection for the external
display.
N/A
N/A
4
GROUND
GROUND connection for the external
display.
N/A
N/A
5
P5_7_TXOUT0M
LVDS Channel 0 Minus Line
P5_7
B9
6
P5_6_TXOUT0P
LVDS Channel 0 Positive Line
P5_6
A9
7
GROUND
Isolates neighbouring pairs of data
signals
N/A
N/A
8
P5_5_TXOUT1M
LVDS Channel 1 Minus Line
P5_5
C10
9
P5_4_TXOUT1P_X
LVDS Channel 1 Positive Line
P5_4
C11
10
GROUND
Isolates neighbouring pairs of data
signals
N/A
N/A
11
P5_3_TXOUT2M
LVDS Channel 2 Minus Line
P5_3
B10
12
P5_2_TXOUT2P
LVDS Channel 2 Positive Line
P5_2
A10
13
GROUND
Isolates neighbouring pairs of data
signals
N/A
N/A
14
P5_0_TXCLKOUTP
LVDS Clock Positive Line
P5_0
A11
15
P5_1_TXCLKOUTM
LVDS Clock Minus Line
P5_1
B11
16
GROUND
Isolates neighbouring pairs of data
signals
N/A
N/A
17
BOARD_VCC
*1
N/A
N/A
18
GROUND
*1
N/A
N/A
19
GROUND
Used to configure the external display in
6 bit mode when pulled low.
*2
N/A
N/A
20
BOARD_VCC
This pin is used to display the image
normal (low signal) or
inverse (high signal).
*3
N/A
N/A
Table 5.21: LVDS Connections
*1. Enables writing to LVDS displays that have 8-bit data pairs. This differential pair is not used since the
RZ/A1H device only has six differential LVDS data lines. As a result, the unused pins on the external display
are wired so that the pair have constant opposing signals (3.3V and GROUND) as required.
*2. This pin is the ‘Mode’ signal on the external display. It is configured low to signal to the display that it will
be used in 6-bit mode.
*3. This pin must be pulled low or high on the external display board’s design.
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