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EPC
®
-6320/21
Theory of Operation
H A R D W A R E
R E F E R E N C E
55
5
Power to CPU V
CORE
+1.15V and Vcct +1.25V are supplied by a Linear Technologies
LTC1703 dual synchronous switching regulator along with external FETs. The LTC1703’s
five voltage identification inputs are programmed with resistors to set output voltage
V
CORE
to +1.15V. The other side of the controller provides the CPU AGTL termination
voltage, V
CCT
at 1.25V using a resistor divider network. The LTC1703 design can provide
up to 25A output current per channel. The current limit is set to 15A for V
CORE
and to
5A for V
CCT
. The expected maximum load current is 10.5A and 2.3A for V
CORE
and V
CCT
respectively.
Interface voltage regulators consist of a series of linear regulators generating +1.5V
and +2.5V to supply CPU, clock generator, 82600 and network controller various
voltage requirements.
A precision voltage reference in conjunction with a voltage comparator provides
monitoring of the +5V and +3.3V supplies. The open collector outputs of the
comparators connect directly to the soft-start inputs for the switching regulator that
creates V
CORE
and V
CCT
. As soon as +3.3V and +5V planes are fully charged, the
switcher begins to power on V
CCT
and, after V
CCT
is stable, V
CORE
starts. Voltage
comparators also monitor the status of V
CORE
, V
CCT
, +2.5V, +1.8V, +1.5V power. The
open collector outputs of the comparators are tied to the system power good line and
causes system reset on any power failure. As soon as the voltages are valid, the board
comes out of reset.
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