3-21
3.14.6
*ESE?
Query the Standard Event Enable Register.
This mask register is
programmed via the *ESE <NRf> command.
3.14.7
*ESR?
Query the Standard Event Status Register. The response will be a base 10
number from 0 to 255 (see Figure 3-1). The Active bits are: Power On,
User Request, Command Error, Execution Error, Query Error, and
Operation Complete.
3.14.8
*SRE <NRf>Program the mask for the Status Request Enable Register. <NRf> is in the
range of 0 to 255. See Figure 3-1 for the bit value definition.
3.14.9
*STB?
Query the Status Byte Register. The response will be a base 10 number
from 0 to 255 (see Figure 3-1). The Active Bits are: MSS/RQS, ESB,
MAV, and DDSB. The MSS/RQS, ESB, and DDSB bits are active only if
their corresponding masks are enabled.
3.14.10
*OPC
This command will respond with the Operation Complete Bit in the ESR
being Set after the 2251A has completed all pending commands. Reading
the ESR will clear the OPC bit.
3.14.11
*OPC?
This command will respond with a 1 after the 2251A has completed all
pending commands.
3.14.12
*WAI
Wait for the 2251A to complete all pending commands.
3.14.13
*TRG
Trigger the 2251A to start a measurement. Used with the T1 Command and
the same as sending a T2 command.
3.14.14
*OPT?
Report the Channel C option status. The response is 0 if not installed and
1 if installed.
3.14.15
*STA?
Return the 2251 (old status) Status byte. See Table 3.18 for the bit
description.
3.14.16 When commanded by a GPIB slot 0; The 2251A responds to the GPIB SDC (Selected
Device Clear) and DCL (Device Clear) commands by clearing its input and output buffers.
This aborts any command string processing taking place, and any pending commands are
lost.
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Содержание 2251A
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