Rabbit 6000 User’s Manual
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10
external interrupt vectors, two of which can each multiplex inputs from up to three external pins. A new
addition to the Rabbit 6000 is a fully featured I
2
C port capable of up to 400 kbits/s and 10-bit addressing.
The Rabbit 6000 has three timer systems. Timer A consists of twelve 8-bit counters, each of which has a pro-
grammed time constant. Six of them can be cascaded from the primary Timer A counter. Timer B contains a
10-bit counter, two match registers, and two step registers. An interrupt can be generated or an output pin
can be updated when the counter reaches a match value, and the match value can then be incremented auto-
matically by the step value. Timer C is a 16-bit counter that counts up to a programmable limit. It contains
eight match registers so that up to four PWM (both synchronous and variable-phase) or quadrature signals
for motor-control applications can be created.
The Rabbit 6000 also provides support for protected operating systems. Support for two levels of opera-
tion, known as
system
and
user
modes, allow application-critical code to operate in safety while user code
is prevented from inadvertently disturbing the setup of the processor. Memory blocks as small as 4 KB can
be write-protected against accidental writes by user code, and stack over/underflows can be trapped by
high-priority interrupts.
Security features are also available in the Rabbit 6000. New instructions were added to the existing
encryption support to increase encryption algorithm speeds dramatically, and 32 bytes of battery-backed
RAM can store an encryption key away from prying eyes.
The Rabbit 6000 supports sixteen channels of DMA access to internal or external memory, internal I/O
addresses, and the external I/O bus. Directing a DMA channel to or from an internal peripheral such as a
serial port or the Ethernet port automatically connects DMA enable signals. Burst size, priority, and guar-
anteed cycles for the processor are all under program control. DMA operations to/from the internal mem-
ory and peripherals can operate simultaneously with code fetches, so no performance hit occurs. When
accessing external memory, DMA operations will alternate between DMA and code fetches as in previous
Rabbit designs.
The Rabbit 6000 contains an 802.11a/b/g wireless MAC peripheral, also designed to operate with the DMA
peripheral. It includes support for all standard Wi-Fi features, including infrastructure and ad-hoc modes.
The high-speed internal A/D converter and D/A converter and clocked-serial control port provide a
generic interface to several common Wi-Fi transceivers. A low-speed A/D converter is also available to
monitor the transmit signal strength if desired. The two A/D converters and single D/A converter are avail-
able for customer use when the Wi-Fi peripheral is disabled.
The Rabbit 6000 also contains a full-featured 10/100Base-T Ethernet MAC peripheral and PHY. Designed
to operate with the DMA peripheral, the Ethernet peripheral is fully compliant with the 802.3 Ethernet
standard, including support for auto-negotiation, link detection, multicast filtering, and broadcast
addresses.
The Rabbit 6000 provides an Open Host Controller Interface (OHCI) USB device MAC and PHY. Fully
supported by the DMA peripheral, the MAC and PHY are USB 2.0 compliant, full-speed (12 Mbit/s)
devices.
Another new feature of the Rabbit 6000 is a 12-bit, 8-channel A/D converter. This A/D converter can run
at up to 1 megasample per second, based on either the internal clock or an external clock input. The A/D
converter is muxed across eight channels which can be sampled individually or continuously across all
channels.
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