Smart Module Series
SC200K_Series_Hardware_Design 63 / 105
4.10.1. MIPI Design Considerations
⚫
Special attention should be paid to the pin definition of LCM and camera interfaces. Different video
devices will have varied definitions for their corresponding connectors. Ensure that the devices and
the connectors are correctly connected.
⚫
MIPI are high speed signal lines, supporting maximum data rate up to 1.5 Gbps. The differential
impedance should be controlled to 100 Ω. Additionally, it is recommended to route the trace on the
inner layer of PCB, and do not cross it with other traces. For the same video device, keep all the MIPI
traces of the same length. In order to avoid crosstalk, a spacing of 1.5 times the trace width is
recommended among MIPI signal lines. During impedance matching, do not connect GND on
different planes so as to ensure impedance consistency.
⚫
It is recommended to select a low capacitance TVS component for ESD protection and the
recommended parasitic capacitance should be below 1 pF.
⚫
Route MIPI traces according to the following rules:
a)
Control the differential impedance to 100 Ω ±10 %.
b) Control intra-lane length difference within 0.5 mm.
c) Control inter-lane length difference within 1.3 mm.
d) The trace length inside the module should be considered when keeping MIPI traces of the same
length.
Table 22: MIPI Trace Length Inside Module
Pin No.
Pin Name
Length (mm)
Length Difference (mm)
52
DSI_CLK_N
58.51
0.19
53
DSI_CLK_P
58.32
54
DSI_LN0_N
58.09
0.03
55
DSI_LN0_P
58.06
56
DSI_LN1_N
58.24
0.5
57
DSI_LN1_P
57.74
58
DSI_LN2_N
59.55
0.39
59
DSI_LN2_P
59.16
60
DSI_LN3_N
58.94
0.22
61
DSI_LN3_P
58.72
63
CSI0_CLK0_N
20.39
0.47
