Power Application Controller
®
-48-
Copyright 2020 © Qorvo, Inc.
Rev 1.0
– Jan 17, 2020
engines for the differential amplifier output. To enable the EMUX set
SOC.SHCFG1.EMUXEN
to 1b. The
EMUX state machine may be reset at any time by setting
SOC.SHCFG1.EMUXEN
to 0b.
In either ADC automatic or manual mode, the ADC buffer must be enabled by setting
SOC.SHCFG1.ADCBUFEN
to 1b before sampling using the ADC.
Each differential amplifier has a dedicated sample and hold engine that may be enabled and disabled
manually or by the DTSE using the EMUX. To synchronize the output of the sample and hold circuit for
DAO10 to the ADC AFE MUX set
SOC.SHCFG1.DAO10SH
to 1b. To bypass the sample and hold circuit
for DAO10 to the ADC AFE MUX set
SOC.SHCFG1.DAO10SH
to 0b. The raw output of the differential
amplifier is always available on AB4.
When the ADC in is manual mode (DTSE not active), the sample and hold circuit may be activated by
writing
SOC.SHCFG2.HLD0
to a 1b (hold) and de-activated by writing
SOC.SHCFG2.HLD0
to a 0b
(release). The ADC AFE MUX channel may be selected by writing
SOC.SHCFG2.MUXA
to the desired
channel.
When the ADC is in automatic mode (DTSE active), the sample and hold state as well as the ADC AFE
MUX channel may be commanded using data from the EMUX, which is sent by the ADC DTSE. The data
is 8b and the format of the bits are the same as shown in
SOC.SHCFG2
.
9.12.5 AIO1, AIO0 Protection
In differential amplifier mode (
SOC.CFGAIO0.MODE10
= 01b), a high side comparator protector HP10
and a low side comparator protector LP10 are also active that can be configured to disable high-side or
low-side gate drivers in the Application-Specific Power Driver (ASPD).
9.12.5.1 HP10 Comparator
The HP10 comparator takes the AIO1 voltage and compares it against the HP-DAC voltage. The 10-bit
HP-DAC value is programmable using
SOC.HPDACH
and
SOC.HPDACL
.
SOC.CFGAIO1.HP10EN
may
be used to enable the HP10 comparator with different blanking times. Set
SOC.SIGSET.HPROTHYS
to
1b to enable HP10 comparator hysteresis.
The output of HP10 comparator can be configured to trigger protection signal PR using
SOC.CFGAIO1.HP10PREN
.
The output of HP10 can also trigger the IRQ1 interrupt by setting
SOC.PROTINTEN.HP10INTEN
to 1b.
The real-time status can be observed using
SOC.SIGINTF.HP10STAT
and the latched interrupt status
can be observed using
SOC.PROTSTAT.HP10INT
.
9.12.5.2 LP10 Comparator
The LP10 comparator takes the output of the differential amplifier and compares it against the LP-DAC
voltage. The 10-bit LP-DAC value is programmable using
SOC.LPDACH
and
SOC.LPDACL
.
SOC.CFGAIO0.LP10EN
may be used to enable LP10 comparator with different blanking times. Set
SOC.SIGSET.LPROTHYS
to 1b to enable LP10 comparator hysteresis.
The output of LP10 comparator can be configured to trigger protection signal PR using
SOC.CFGAIO1.LP10PREN
.
