QM_XC7A35T_SDRAM Core Board
User Manual V02
2.2
QM_XC7A35T_SDRAM Hardware Design
2.2.1
QM_XC7A35T_SDRAM Power Supply
The core board needs 5V DC input as power supply which could be directly injected from power header or the 64P
female header U7/U8. Users may refer to the hardware schematic for the detailed design. The on board LED D4
indicates the 3.3V supply, it will be turned on when the 5V power supply is active. In default status, all the FPGA banks
IO power level is 3.3V because bank power supply is 3.3V. However, BANK34 and BANK35
IO’s power level could be
changed according to detailed custom requirement. There’re three 0 ohm resisters could be removed: R223/R224/
R225, and instead the BANK34 and BANK35
’s power supply could be injected from 64P female header U8. Detailed
design refer to hardware schematic.
Note: FPGA core supply 1.0V is regulated by On-Semi DC/DC chip NCP1529 which could output maximum 1A
current.
Figure 2-5. Power Supply for the FPGA
3V3
1V8
C22
100NF
C20
100NF
C21
100NF
C19
100NF
1V0
C18
10V
4.7uF
C35
10V
4.7uF
C37
100NF
C36
100NF
3V3
1V0
C74
10V
4.7uF
C76
100NF
C75
100NF
VCCO_34_35
C61
10V
4.7uF
C62
100NF
XADC is not used!
C63
100NF
C28
100NF
C29
100NF
C53
10V
4.7uF
3V3
VCCO_34_35
1V8
C77
10V
4.7uF
1V8
C78
100NF
C79
100NF
XC7A35T-FTG256
U9F
GND_30
A1
GND_29
A11
GND_28
B8
GND_27
C5
GND_26
C15
GND_25
D2
GND_24
D12
GND_23
E9
GND_22
F6
GND_21
F10
GND_20
F16
GND_19
G3
GND_18
G9
GND_17
G13
GND_16
H6
GND_15
J9
GND_14
J11
GND_13
K4
GND_12
K6
GND_11
K14
GND_9
L1
GND_8
L11
GND_7
M8
GND_6
N5
GND_5
N15
GND_4
P2
GND_3
P12
GND_2
R9
GND_1
T6
GND_0
T16
VCCINT_0
F7
VCCINT_1
F9
VCCINT_2
G6
VCCINT_3
H9
VCCINT_4
J6
VCCINT_5
K9
VCCINT_6
L8
VCCAUX_3
G10
VCCAUX_2
J10
VCCAUX_1
K11
VCCAUX_0
L10
VCCO_0
L6
VCCO_14_0
L16
VCCO_14_1
M13
VCCO_14_2
N10
VCCO_14_3
P7
VCCO_14_4
R14
VCCO_14_5
T11
VCCO_15_0
A16
VCCO_15_1
B13
VCCO_15_2
C10
VCCO_15_3
E14
VCCO_15_4
H15
VCCO_15_5
J12
VCCO_34_0
M3
VCCO_34_1
R4
VCCO_34_2
T1
VCCO_35_0
A6
VCCO_35_1
B3
VCCO_35_2
D7
VCCO_35_3
E4
VCCO_35_4
F1
VCCO_35_5
J2
VCCBRAM_0
E10
VCCBRAM_1
F11
GNDADC_0
G7
VCCADC_0
G8
VREFP_0
J8
VN_0
J7
VCCBATT_0
F8
VREFN_0
H7
VP_0
H8
CFGBVS_0
E7
3V3
1V8
