QMTECH XC7A 100T Starter Kit
User Manual V01
2.2.2
SPI Flash Boot
In def ault, the FPGA XC7A100T boots from external SPI Flash, detailed hardware design is shown in below
f igure. The SPI f lash is using MT25QL128 manuf actured by Micron, with 128Mbit memory storage.
Figure 2-6. SPI Flash
The FPGA boot sequence setting M0:M1:M2 is configured as 1:0:0 which indicates FPGA will boot from SPI
Flash af ter power on.
Figure 2-7. M0:M1:M2 Hardware Settings
The LED D1 will be turned on af ter the FPGA successfully loading configuration file from SPI Flash during
power on stage. In this case, LED D1 could be used as FPGA loading status indicator.
Figure 2-8. FPGA_DONE Status Indicator
FPGA_DQ0
FPGA_DQ2
FPGA_DQ1
FPGA_DQ3
FPGA_CCLK
U3
MT25QL128ABA1ESE
nCE
1
SIO3
7
SO/SIO1
2
VSS
4
SI/SIO0
5
SCK
6
SIO2
3
VDD
8
C1
100nF
3V3
R3
4.7K
3V3
FPGA_CSO_B
R4
4.7K
R2
4.7K
TDO
TDI
TCK
TMS
3V3
1V8
FPGA_DONE
PROG_B
R9
4.7K
3V3
3V3
FPGA_CCLK
XC7A100T-FGG676
U1A
DONE_0
W10
TCK_0
H12
VCCBATT_0
G14
VN_0
P11
VREFP_0
P12
GNDADC_0
M11
VCCADC_0
M12
DXP_0
R12
CCLK_0
H13
VP_0
N12
VREFN_0
N11
DXN_0
R11
TDO_0
J10
TDI_0
H10
INIT_B_0
V11
M1_0
Y 9
M0_0
AB7
TMS_0
H11
PROGRAM_B_0
AE16
CFGBVS_0
AB15
M2_0
W9
R1
1K
D1
Red
1
2
3V3
R5
1K
FPGA_DONE
