Manual for Superb 3L
l
CKE/CSB/CSA/DQM
Normal
Sets the buffer strength of DRAM.
/MD Driving Rate
strong
strongest
weak
l
AD current rate
Normal
Controls buffer strength of AD on bus.
strong
strongest
l
PCI control Signal
Normal
PCI control signals current rating.
rate
strong
strongest
l
system BIOS
Enabled
Beside conventional memory, video BIOS area is
Cacheable
also cacheable.
Disabled
Video BIOS area is not cacheable.
l
Video RAM
Enabled
Beside conventional memory, video RAM area is
Cacheable
also cacheable.
Disabled
Video RAM area is not cacheable.
l
Memory Hole at
Enabled
Memory hole at 15-16m is reserved for expanded
15m-16m
PCI card.
l
AGP Aperture Size 4~256
Sets the effective size of the Graphics Aperture
(MB)
to be used in the particular PAC Configuration.
l
Graphic Window
Enabled
Sets CPU cache type in order to enhance 3D
WR combin
graphic performance.
Disabled
Disables this function.
l
Concurrent function
Enabled
CPU access memory cycles and PCI masters access
(MEM)
memory cycles can be concurrently issued on to
host bus and PCI bus.
Disabled
either CPU or PCI masters starts memory access
cycle will block the other one’s cycle until be
current cycle is finised.
l
Concurrent function
Enabled
CPU access PCI bus cycle and PCI masters
(PCI)
access memory cycles can be concurrently issued
on to host bus and PCI bus.
Disabled
Either one of these two kinds of cycles will block
the other until the current cycle is finished.
l
CPU Pipeline control
Enabled
There might be more than two pending cycles at
one time depends on the CPU behaviour.
Disabled
Only one pending cycle is allowed at one time.
l
Memory parity
Enabled
Checks memory parity.
check
Disabled
Disables this function.
Chapter 3