M a nua l f or B r i l l i a nX 8V
There is one jumper setting on the motherboard, clear CMOS jumper JCC.
Pin 1 of the jumper is located on the side with a thick white line (Pin 1
), referring to the motherboard silkscreen. Jumpers with three pins will
be shown as to represent pin1&pin2 connected and to
represent pin2 & pin3 connected.
Clear CMOS (JCC)
If you want to clear CMOS, unplug the AC power supply first, close JCC(pin1&pin2) once,
set JCC back to the normal status with pin2&pin3 connected, then power on the system.
Memory Configuration
This mother board provides three 168 pin 3.3V un-buffered D IMM soc kets to support a
flexible memory size ranging from 8MB/384MB for SDRAM or from 8MB/768MB for EDO
memory. Both 66MHz/100MHz SDRAM with SPD and 66MHz EDO DIMMs are supported.
The following set of rules allows for optimum configurations.
Rules for populating a 440BX memory array:
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Processors with 100MHz front-side bus should be paired only with 100MHz SDRAM.
Processors with 66MHz front-side bus can be paired with either 66MHz or 100MHz
SDRAM.
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Using the serial presence detect (SPD) data structure, programmed into an E
2
PROM on
the DIMM, the BIOS can determine the SDRAM’s size and speed.
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The DRAM Timing register, which provides the DRAM speed grade control for the entire
memory array, must be programmed to use the timing of the slowest DRAMs installed.
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Possible SDRAM DIMM memory sizes are 8MB, 16MB, 32MB, 64MB, 128MB in each DIMM
socket.
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Possible EDO DIMM memory sizes are 8MB, 16MB, 32MB, 64MB, 128MB, 256MB in each
DIMM socket.
Installation Instruction
Normal status:
Clear CMOS:
JCC
JCC
(Unplug the AC power supply)
