Pumpkin UM-20, Руководство пользователя

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Specifications subject to change without notice. All dimensions in inches. © Copyright 2012 The Connor-Winfield Corporation
Application Note AN2093
Page
19
Revision P01
Date
10 May 2013
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630-851-4722
Fax: 630- 851- 5040
www.conwin.com
Section 5: Design Checklist
5.1 Power Supply Checklist
• Select a LOW noise power circuit / source
• Add a large bulk capacitor at the voltage regulator’s output that can provide current for local capacitors and
ensure regulator stability.
• Place bulk capacitors as close to the voltage regulator output as possible.
• The large bulk capacitor’s capacitance should be 10 to 100 times as large as local IC decoupling capacitors.
• Add a second capacitor an order of magnitude or two smaller in capacitance relative to the large bulk
capacitor to help filter high-frequency noise.
• Place a local capacitance as close as possible to the power supply pin of each IC.
• The side of the local capacitor that connects to ground should be placed as close to the IC’s ground pin as
possible in order to minimize the loop area between the cap and the power and ground pins.
• Add a filter, such as an L-C filter or an R-C filter, to the power supply circuit.
5.2 Ground
• Design using a ground plane instead of traces when connecting components to ground.
• If a top level copper pour is used, it should cover as much of the board as possible, including the spaces
between devices and traces. EXCLUDE THE AREA UNDER THE OCXO.
• Separating the analog ground plane from the digital ground plane improves analog performance.
• Separate ground planes should be connected in only one location, usually close to the power supply.
5.3 General
• Keep analog and digital signals as far apart from each other as possible.
• Avoid routing analog and digital traces perpendicular to each other.
• Avoid routing analog or digital signals under oscillators.
• Trace width should remain constant throughout the length of the trace.
• Turns in traces should be routed using two 45 degree turns instead of one 90 degree turn.
• Trace length should always be minimized.
• Use vias only when absolutely necessary.
• Avoid the use of vias when routing high-frequency signals.
• Keep traces as small as possible.
• Place the OCXO as close as possible to the timing circuitry.
• Never leave the control voltage signal floating.
• Design using a power plane instead of traces routed from the power supply.