protech PC-550, Руководство пользователя, Страница: 97 / 106

Appendix C Trouble Shooting
Page: C-5
PC-550 USER
′
S MANUAL
BE :
Program defaults values into chipset according to the MODBINable Chipset
Default Table.
C1 :
Auto-detection of onboard DRAM & Cache.
C5 :
Copy the BIOS from ROM into E0000-FFFFF shadow RAM so that POST
will go faster.
08 :
Test the first 256K DRAM.
09 :
1. Program the configuration register of Cyrix CPU according to the
MODBINable Cyrix Register Table.
2. OEM specific cache initialization (if needed).
0A :
1. Initialize the first 32 interrupt vectors with corresponding Interrupt handlers
Initialize INT no from 33-120 with Dummy(Spurious) Interrupt Handler.
2. Issue CPUID instruction to identify CPU type.
3. Early Power Management initialization (OEM specific).
0B :
1.Verify the RTC time is valid or not.
2. Detect bad battery.
3. Read CMOS data into BIOS stack area.
4. PnP initializations including (PnP BIOS only).
-Assign CSN to PnP ISA card.
-Create resource map from ESCD.
5. Assign I/O & Memory for PCI devices (PCI BIOS only).
0C :
Initialization of the BIOS Data Area (40 : 0N-40:FF).
0D :
1. Program some of the Chipset‘s value according to Setup. (Early Setup
Value Program).
2. Measure CPU speed for display & decide the system clock speed.
3. Video initialization including Monochrome ,CGA, EGA/VGA. If no
display device found, the speaker will beep.