Premio WCO-3000-KBL-U Series, Руководство пользователя, Страница: 57 / 60

WCO-3000-KBL-U | User’s Manual
57
WDT Sample Code
// IO Address 0xA16 is time value
// IO Address 0xA15 is WDT enable and configuration
Example, Set 0xA16=-0x03, 0xA15=0x31, it will reset after 3 seconds
#define TimePort 0xA16
#define TimeEnablePort 0xA15
WriteByte (TimePort,0x03)
WriteByte (TimeEnablePort,0x31)
Appendix – WDT & GPIO
Watchdog Timer Configuration Register 1 – base a 05h
Bit Name R/W Reset
Default
Description
7 Reserved R - 0 Reserved
6 WDTMOUT_STS R/W 5VSB 0
If watchdog timeout event occurred, this
bit will be set to 1. Write a 1 to this bit will
clear it to 0.
5 WD_EN R/W 5VSB 0
If this bit is set to 1, the counting of
watchdog time is enabled.
4 WD_PULSE R/W 5VSB 0
Select output mode (0: level, 1: pulse) of
RSTOUT# by setting this bit.
3 WD_UNIT R/W 5VSB 0
Select time unit (0: 1 sec, 1: 60 sec) of
watchdog timer by setting this bit.
2 WD_HACTIVE R/W 5VSB 0
Select output polarity of RSTOUT# (1: high
active, 0: low active) by setting this bit.
1-0 WD_PSWIDTH R/W 5VSB 0
Select output pulse width of RSTOUT#
0: 1 ms
1: 25 ms
2: 125 ms 3: 5 sec
Watchdog Timer Configuration Register 2 – base a 06h
Bit Name R/W Reset
Default
Description
7-0 WD_TIME R/W 5VSB 0 Time of watchdog timer