Chapter 6: Programming
These cards are I/O-mapped devices that are easily configured from any language and any language can
easily perform digital I/O through the card's ports. This is especially true if the form of the data is byte or
word wide. All references to the I/O ports would be in absolute port addressing. However, a table could be
used to convert the byte or word data ports to a logical reference.
Developing Your Application Software
If you wish to gain a better understanding of the programs on diskette, then the information in the following
paragraphs will be of interest to you. Refer to the data sheets and 8255-5 specification in Appendix A.
A total of 16 register locations are used by the 48(S). The PPIs are addressed consecutively with Address
bits A3 through A0 as follows:
Address
Port Assignment
Operation
Base Address
PA Group 0
Read/Write
Base A1
PB Group 0
Read/Write
Base A2
PC Group 0
Read Write
Base A3
Control Group 0
Write Only
Base A4
PA Group 1
Read/Write
Base A5
PB Group 1
Read/Write
Base A6
PC Group 1
Read/Write
Base A7
Control Group 1
Write Only
Base A8
Enable/DisableBuffer,Grp0
Write Only
Base A9
Enable/DisableBuffer,Grp1
Write Only
Base AB
Enable Chg-of-St. Interrupt
Write Only
Base AF
Clear Chg-of-St. Interrupt
Write Only
Table 6-1:
Address Assignment Table
These cards use two 8255-5 PPIs to provide a total of 48 bits input/output capability. The cards are
designed to use each of these PPIs in Mode 0 wherein:
a.
There are two 8-bit groups (A and B) and two 4-bit groups (C Hi and C Lo).
b.
Any group can be configured as an input or an output.
c.
Outputs are latched.
d.
Inputs are not latched.
Manual PCI-DIO-48(S)
17
