PEX 8112 Fwd Riser Reference Design for Board Revision 1.0
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Version 1.1
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Copyright © 2010 by PLX Technology, Inc. All rights reserved
1.1
PEX 8112 Features
Compliant to the following specifications:
PCI Express Base Specification, Revision 1.0a
PCI Express to PCI Bridge Specification, Revision 1.0
PCI Local Bus Specification, Revision 3.0
Small package, enabling compact design
Supports Forward and Reverse Bridging, allowing systems to migrate to PCI Express and leverage
software compatibility
Note: The PEX 8112 Fwd Riser is for Forward Mode designs. For Reverse Mode designs, refer to the
PEX 8112 Rev Riser.
Integrated PCI Express interface with x1 link, dual-simplex 2.5 Gbps SerDes
Single PCI Express port, capable of x1 link width
Single PCI Bus segment supporting PCI protocol at 32-bit/66 MHz
Low power consumption, meeting designers’ demands for reduced power draws
3.3V I/O and 5V tolerant PCI
Serial EEPROM configuration option with Serial Peripheral Interface (SPI)
8-KB general-purpose shared RAM
1.2
PEX 8112 Fwd Riser Features
PLX PCI Express-to-PCI bridge device in a 13mm x 13mm, 144-ball PBGA package
Form factor based on the
PCI Local Bus Specification, Revision 3.0
Single x1 PCI Express Edge connector for insertion into standard PCI Express slot of x1 or greater link
width
One downstream 32-bit PCI slot
Socketable SPI serial EEPROM (3.3V devices supported)
LEDs for link status visual inspection
Auxiliary floppy disk power connector for additional power requirement support
