5
2.2. JTAG Support
The PCI bus has connections which may be used for `boundary scan` test processes.
PCI-Proto LAB/PLX-S
also designated as `JTAG pins` makes these lines to the user on a pin
header.
2.3. EEPROM
The serial EEPROM is used in the initializing phase (when booting the host computer). It
contains obligatory configuration data which initialize the PCI controller specifically for the
PCI-Proto LAB/PLX-S
application. It is possible to read in, edit and write down the
EEPROM content with the aid of the software program
PlxMon
which is delivered with
PLX SDK
.
3. Example Application
PCI-Proto LAB/PLX-S
has an example application which has the purpose of showing the
user how various hardware requirements (I/O and memory access, high- and low-active signal
plays) can be adjusted. The application example makes it possible to write and read data long
words (32bit data) without greater hardware expenditures. For this purpose, a simple control
signal decoder has been created which provides control signals for writing and reading data.
PCI-Proto LAB/PLX-S
is equipped with latches for intermediate storage of 32bit data input
or output. The additionally required logic is placed in a EPLD device, which also reserves
space for user-specific modifications. It can be programmed 'in system' with a simple connec-
tion cable over the computer parallel port. The source texts for EPLD are a component of this
documentation. Software for EPLD programming is available from your local Lattice sales
office normally without additional costs or as download from Lattice`s WEB presentation.
4. Some Tips for Use
In order to successfully design PCI hardware development with
PCI-Proto LAB/PLX-S
, it is
absolutely necessary to study this documentation and the technical manual on the PCI control-
ler. If it is not enclosed in the
PCI-Proto LAB/PLX-S
product, you can request it at no cost
from:
PLX Technology /USA
or
Scantec – Topas /Germany
.
You will find the addresses and telephone numbers of the companies mentioned in the appen-
dix of this documentation.
You will also find information and tips how to work with the PCI controller on the Internet.
A technical manual on the PCI9030 is available as a PDF file. It can be downloaded at PLXs
web sides and you will also find some web addresses are also enclosed in the appendix.
Содержание PCI-Proto Lab/PLX-S
Страница 8: ...8 6 Appendix...
Страница 9: ...9 6 1 Block Diagram...
Страница 10: ...10 6 2 Electronic Circuit In this shortened manual version this chapter is not included...
Страница 11: ...11 6 3 Connection Diagrams Connection Diagram Component Side...
Страница 12: ...12 Connection Diagram Solder Side...
Страница 19: ...19 6 7 Component Diagram...
Страница 20: ...20 6 8 Oscillograms...
Страница 21: ...21 6 8 1 Oscillogram host accesses to the example application at the local bus local ready controlled...
Страница 22: ...22 6 8 2 Oscillogram 32bit host write access to the local bus PlxMon command ol adr 0h local ready controlled...
Страница 23: ...23 6 8 3 Oscillogram 32bit host read access from the local bus PlxMon command il adr local ready controlled...