PLX Technology PEX 8680, Руководство по конструкции аппаратуры

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PEX 8680 Quick Start Hardware Design Guide, Version 1.1
© 2011 PLX Technology, Inc. All Rights Reserved.
11
4 I
2
The PEX 8680 implements dual two-wire I
C Interface
2
C interface ports. I
2
C-Port 0 is a slave interface port and I
2
C-
Port 1 is a master interface port used with the SHPC (see Section 5). Through its I2C_SCL0 and
I2C_SDA0 balls (I
2
C-Port 0), the PEX 8680 allows an external I
2
C Master to read and write device
registers through an out-of-band mechanism. The simplest way to implement an I
2
Figure 12
C interface to the PEX
8680 is illustrated in .
VCC
PEX 8680
I2C_SDA0
I2C_SCL0
VCC
1
2
R
R
R = 1K to 10K
Figure 12. I
2
C Interface Block Diagram
5 Hot Plug Circuitry
The PEX 8680 supports four Parallel Hot Plug Controllers (PHPC) and up to nineteen Serial Hot Plug
Controllers (SHPC), to service its downstream Ports. The PHPCs are designated as Hot Plug Ports A, B,
C, and D. Each PHPC has 10 Hot Plug signal balls to control various Hot Plug-related functions:

HP_ATNLED_[n]#

HP_BUTTON_[n]#

HP_CLKEN_[n]#

HP_MRL_[n]#

HP_PERST_[n]#

HP_PRSNT_[n]#

HP_PWER_GOOD_[n]

HP_PWREN_[n]

HP_PWRFLT_[n]#

HP_PWRLED_[n]#
where “n” is A, B, C and/or D
Figure 13 provides an example of how to connect the PEX 8680’s PHPC to the external circuit, to build
a complete PHPC circuit.