Ch.3 XpressGX5LP-SE Features
XpressGX5LP-SE Reference Manual
16
The following table shows the pin assignments for the FPGA and CPLD configuration signals:
FPGA Configuration Signals
Signal
CPLD
Signal Name/Function
FPGA
nConfig
K13
nConfig
AK35
Conf_done
K15
Conf_done
AH6
Nstatus
L15
nstatus
AM5
Init_done
K12
Init_done
AL34
Dclk_cpld
J4
Dclk_CPLD
AC31
Msel0
H14
Msel0
AA9
Msel1
G14
Msel1
AA10
Msel2
H15
Msel2
AD8
Msel3
G15
Msel3
AG8
Msel4
H16
Msel4
AH7
CPLD Configuration Signals
osc_config_cpld
H5
osc_config_fpga
AV29
clrconfig#
E14
Reset push button (BPCONF)
--
Max_SW0
C14
Configuration boot sector switch
(SW1-4)
--
flash_reload_enable
(conf_rfu0)
L14
Flash reload enable
AV22
flash_boot_number
(conf_rfu1)
N14
Flash boot number
AR24
Conf_rfu2
K14
Conf_rfu2
AR22
conf_rfu3
J14
conf_rfu3
AU21
conf_rfu4
N15
conf_rfu4
AM23
conf_rfu5
M15
conf_rfu5
AW22
conf_rfu6
M14
conf_rfu6
AP24
CPLD Configuration LEDs
cpld_confdone
R13
CPLDOK LED (green)
--
max_leduser0
R14
DSMAX0 LED (Red)
--
max_leduser1
T15
DSMAX1 LED (Green)
--
max_leduser2
R16
DSMAX2 LED (Orange)
--
XpressGX5LP-SE Power Management
ddr3_pgood
D4
DDR3 termination supply power
good
--
ddr3_slp_s3
D6
DDR3 termination supply enable
--
por_VCCA_GXB
N10
VCCA_GXB Power on Reset
--
Table 4: FPGA and CPLD pin assignments