PDV-LC10
12
3. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM
3.1 BLOCK DIAGRAM
UD/RL
ZOOM
80
81
29
CN2001
30
CN2001
OSC2
OSG1
67
74
52
56
57
I
96
97
RESET OUT
SCK0
SI0
S2001
S2013
SETUP
AVON
LCD TP
PAL
BAT_SL
LCD ON
TVSEL
TVSEL
REV
DOWN
UP
TOPMEN
FWD
LEFT
STOP
PLAY/PAUSE
RIGHT
ENTER
TITLE
MENU
SELEG
78
21
6
15
19
5
7
31
26
47
23
77
SEG15
COM0
COM3
SEG0
LCD
Panel
X2001
39 16 17 19 20
4
5
26
35
7
8
10
CN2001
OPENSW
DISCOP
LT
XREADY
18 11
87
71
70
19 36 37 39 40
CN602
IC2001
PE5060A
µ
-CONTROL IC
To CN401
PDV-LC10 Only
V2001 VAW1051
24 25
6
15
10
16
27 28 30
—
—
—
—
—
—
–
–
–
Spindle
Motor
TA
FA
Slider
IC101
RF IC
IC351
BA5929FP
IC251
BA6195FP
RF
RF
LA9701M
VCO
A/D
CONV.
Sync
Demod
Spindle
control
ECC &
ID Reg.
Sub-CPU
I/F
DRAM I/F
(bus arbitor)
CPU
I/F
DMA
CD-ROM Sync gen.
Sub-code Buffer
VBR Buffer
16M bit DRAM
SREQ
FLDV
XRESET
27
16
PCM DATA,
DOUT
PDVDM ASSY
PDVDS ASSY
LPF
PWM
FG
FG
16
TE
FG
TRKG DRV
FOCS DRV
SLD DRV
SPDL DRV
FE
MY-CHIP
SHI-ASIC
IC610
PD4995A
IC201
SERVO DSP
LC78652W
IC602
PD3410A
SH1 ASIC
3V-5V
LVL
SHIFT
IC608
KM48V2100CS
IC603
TC74VHC541AFT
A
B
1
60
62
18
9
56
4
126
107
181
118
102
165
2-5
72-77,102,103
9-12
2-5
112-119
22-50
55-66
108-111
146
170
162
203
161
64
84
82
103
98 97
78
3
55
54
14
32 33
20
46
45
47
48
44
74
26
52-59 146-163
: AUDIO SIGNAL ROUTE
: RF SIGNAL ROUTE
: V/CB SIGNAL ROUTE
: Y SIGNAL ROUTE
: C SIGNAL ROUTE
(V/CB)
(Y)
(C)