PDP-507XD
142
1
2
3
4
1
2
3
4
C
D
F
A
B
E
N
N
I
F O R
D
V
E C
I
S
N A L
G
N
I
O
F
D
V
M
E C
A
M
T I O
A
–
V 1
3
1
0 6 0
– 0
0
0 : 0
– 0
0
1 : 0
– 0
0
2 : 0
– 1
0
5 : 0
– 1
0
6 : 0
– 1
0
7 : 0
– 1
0
8 : 0
– 1
0
9 : 0
– 1
0
A : 0
D
V
M
E C
D
V
S
E C
– 1
0
D : 0
– 8
0
8 : 0
– 8
0
9 : 0
– 8
0
A : 0
– 8
0
B : 0
– 8
0
C : 0
– N T V
H
E
–
B 7
1
5
10
15
16
1
5
10
15
20
25
30
35
40
Displays input signal status of VDEC terminal.
Device
SA
Context
MVDEC
00h
Signal distinction result 1
01h
Signal distinction result 2
02h
Flag detection output
15h
Noise level distinction 1
16h
Noise level distinction 2
17h
Non-standard signal detection
18h
Subcarrier signal detection
19h
ACC data output
SVDEC
1Ah
ACC information output
1Dh
Input signal mode
88h
Status register 1 (TV/VCR status)
89h
Status register 2 (Macrovision detection, etc.)
8Ah
Status register 3 (Front-end AGC gain value)
8Bh
Status register 4 (Subcarrier to horizontal (SCH) phase)
8Ch
Status register 5 (Signal distinction)
8.2.1.8 VDEC SIGNAL INFO
Содержание PDP-507XA
Страница 20: ...PDP 507XD 20 1 2 3 4 1 2 3 4 C D F A B E 2 6 PANEL CHASSIS SECTION 1 9 2 11 4 7 7 7 7 7 3 7 10 8 7 10 7 6 5 ...
Страница 41: ...PDP 507XD 41 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 44: ...PDP 507XD 44 1 2 3 4 1 2 3 4 C D F A B E 4 2 OVERALL CONNECTION DIAGRAM 2 2 ...
Страница 45: ...PDP 507XD 45 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 55: ...PDP 507XD 55 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 78: ...PDP 507XD 78 1 2 3 4 1 2 3 4 C D F A B E 500ns div 500ns div 200ns div ...
Страница 191: ...PDP 507XD 191 5 6 7 8 5 6 7 8 C D F A B E Block Diagram R2S11002AFT MAIN ASSY IC4701 AV SW ...
Страница 192: ...PDP 507XD 192 1 2 3 4 1 2 3 4 C D F A B E Block Diagram R2S11001FT MAIN ASSY IC4901 Component SW IC ...