PDP-505HD
26
A
B
C
D
1
2
3
4
1
2
3
4
SYNC SEPA IC
IC2002
(M52346S)
SYNC_SEPA
CONTROL
LOGIC
CLP_SEPA
HSTATE
HPOL
VSTATE
VPOL
CLAMP/
BLANKING
PULSE
CONTROL
SYNC CONTROL PLD
IC2005(PDY069)
MASK_DSW
CLP_SW1,2
HD_PLD
HD_3
HD_4
VD_4
VD_3
VD_PLD
IC2004(2/2)
TC74VHC123
IC2004(2/2)
TC74VHC123
CLP_AMP
CLP_MAT
HBLK_MAT
VBLK_MAT
Noise
Mask
Gate
VD_FIL
VD_MASK
HD_FIL
HD_MASK
Noise
Mask
Gate
K2033
K2025
K2023
K2032
K2026
K2024
K2004
K2021
K2020
K2012
K2015
K2013
K2014
13pin
8pin
6pin
14pin
HD_+
HD_SEP
VD_SEP
HD_–
VD_+
15pin
17pin
4pin
19pin
18pin
1 pin
2pin
Input from IC1201
(Jungle-IC)
in Comp/S input
(Positive polarity)
Separate HD/CS,
VD SYNC signal
input from BNC/D-
sub 15p
Y/G ON SYNC signal
in inputting Y color-
difference or RGB
signals
Clamp & Blanking pulse
output to Analog Video
block
Control signal for switching
mask width (Lo : In PC input)
Noise cancel processing
Limit to U-com processing
velocity (Max: 200Hz)
HD/VD SYNC signal selected by input function
for generating Mask pulse
(except for when selecting HD_PLD, VD_PLD)
Noise cancel processing
Countermeasure for copy guard
Limit to U-com processing velocity
(Max: 200kHz)
SYNC signal output
separated from Y/G
ON SYNC signal
Selected HD/VD signal
used for Separate input
SYNC signal detection
Information on detecting Separate
input SYNC signal & the polarity
CLP_SEP (Switching
Clamp pulse width
Clamp pulse generated by SYNC
Separate IC (Used in PC input)
SYNC signal selected based on
input function & HD/VD signal
detected (Unify the polarity to
negative polarity)
Signal
selector for
SYNC signal
&
Circuit for
switching
polarity
Decoding
HD/VD signal
detected
Selecting input
SYNC signal
Setting value of
HOLD Pulse width
20 bit /
Parallel
data
3.4 SYNC SIGNAL PROCESSING BLOCK
Содержание PDP-505HD
Страница 5: ...PDP 505HD 5 ...
Страница 45: ...PDP 505HD 45 ...
Страница 46: ...PDP 505HD 46 A B C D 1 2 3 4 1 2 3 4 3 11 OVERALL CONNECTION DIAGRAM 1 2 ADX2643 ...
Страница 47: ...PDP 505HD 47 A B C D 5 6 7 8 5 6 7 8 ADX2643 ADX2643 ADX2643 ADX2643 ADX2643 ...
Страница 48: ...PDP 505HD 48 A B C D 1 2 3 4 1 2 3 4 3 12 OVERALL CONNECTION DIAGRAM 2 2 L0006 ATX1041 L0007 ATX1041 ...
Страница 49: ...PDP 505HD 49 A B C D 5 6 7 8 5 6 7 8 ADX2643 ADX2643 ADX2643 ADX2643 ...
Страница 51: ...PDP 505HD 51 A B C D 5 6 7 8 5 6 7 8 AUTO ZOOM BLOCK ...