Pioneer PD-F1007, Руководство по обслуживанию

Страница: 46 / 56

PD-F1007
46
No. Symbol Name I/O Description
71 Vss Vss – GND
72 P56/A14 IO2
O External RAM data Input/Output
73 P57/A15 IO3
74 P60 SCHK I Input for slave judgment (L: Slave)
75 P61 MCHK I Input for master judgment (L: Master)
76 P62 Not used
O Output of "L"
77 P63 Not used
78 P64/RD A16 O External RAM address line
79 P65/WR WE O Write control output (L: Write)
80 P66/WAIT CS O External RAM chip selection output
(H: Standby)
81 P67/ASTB RD O Read control output (L: Read)
82 P100/TI5/TO5 MUTS O Slave side mute output (L: Mute)
83 P101/TI6/TO6 DSLT O Selector output
Count-up
(DSRT: L, DSLT: H)
84 P102 DSRT O Count-down (DSRT: H, DSLT: L)
Stopped
(DSRT: L, DSLT: L)
85 P103 MOPN O Door motor output
Open (MOPN: H, MCLS: L)
86 P30/TO0 MCLS O Close (MOPN: L, MCLS: H)
Stop
(MOPN: L, MCLS: L)
No. Symbol Name I/O Description
87 P31/TO1 LIN O Output for loading motor
IN
(LIN: H, LOUT: L)
88 P32/TO2 LOUT O OUT (LIN: L, LOUT: H)
Stop (LIN: L, LOUT: L)
89 P33/TI1 LDON O Laser diode output (H: ON, L: OFF)
90 P34/TI2 XRST O Reset output for each LSI
91 P35/PCL TRST O CD TEXT decoder IC reset output
(L: Reset)
92 P36/BUZ CLED O Center LED lighting control (H: Lit)
93 P37 PLED O Sensor output for disc detection
(H: Lit)
94 P90 Not used O Output of "L"
95 P91 TRST I Test mode input for checker (H: Test)
96 P92 MSOT O Master control output (control of the
slave)
97 P93 SLOT O Slave output (response to the master)
98 P94 HBIT I Hi-bit correspondence switching
input (H: Hi-bit correspondence)
99 P95 TEST I Test mode switching input
(H: Test mode)
100 P96 DQSY I CD TEXT data timing input
M5M51008BFP–70LL (IC352: MAIN BOARD ASSY)
S-RAM
Block Diagram
31
28
Address Input Buffer
Row Decoder
131072 Words
×
8 bits
1024 Rows
×
128 Columns
×
8 Blocks
Output Buffer
Sense Amp.
A4
A5
A6
A7
A12
A14
A16
A15
A13
8
7
6
5
4
3
2
21
19
18
17
15
14
13
20
29
22
30
24
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
A8
32
VCC (5V)
16
GND (0V)
OE
S1
S2
27
10
12
Address Input
Buffer
Address Input
Buffer
A0
A2
A3
9
A10
23
25
26
11
Column
Decoder
Block
Decoder
Clock Generator
Data Input Buffer
A1
A11
A9
W