DVR-640H-S
117
5
7
8
5
6
7
8
C
D
F
A
B
E
DM
2
, DP
2
IO
Data lines for Port 2, a dedicated USB Host port.
VBUS
I
V
BUS
input sampled during HNP/SRP operations by the OTG
port.
VBP
IO
H
V
BUS
pulsing control. This pin is used only when Port 1 is an
OTG port for a B-DEVICE.
CLK
W
I
This pin is available only in the QFP package
CLKCFG
I
This pin is available only in the BGA package
ENVREG
I
Enables the internal Voltage Regulator if asserted.
3.3V
2.5V
D2.5V
Analog ground.
VREGOUT
PW
Internal Voltage Regulator output of 2.5V
V
DD3.3A
PW
V
DD2.5A
PW
V
SSA
PW
V
DD2.5
PW
V
DDW
PW
Wide-range IO +3.3V or +2.5V.
V
SS
PW
Digital/Wide-range IO ground.
NC
PS
No connection. These pins should be left floating.
Signal
Type
Active
Level
Pin/Signal
Description
Pin/Signal
Name
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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TEL 13942296513 QQ 376315150 892498299