DVR-104
63
5
7
8
5
7
8
C
D
F
A
B
E
Block Diagram
Pin Function
UPD63600GH-8EV (DVR R4 MAIN ASSY: IC230)
• Combo-DSP
RFI
D/A
A/D
SV Control
Wobble
PLL
ATIP
PLL
ATIP
Decoder
CIRC
ENDEC
Audio
DAC
Audio Output
Audio
Output
DSP
CAV
CLV
Write
Strategy
Read
Channel
EFM
Encoder
EFM
Decoder
8/16
Decoder
Clock
Generator
16.9344MHz
PI
Decoder
Header/ID
Detector
Control
Registers
Local CPU Interface
Local CPU
Error
Correction
Engine
AUDAU
SDRAM
Control
SDRAM
BMU
SV
PIU
SIU
Host
I/F
HIU
PMU
PMU
ECU
Syndrome
Generator
Syndrome
Buffer
SGU
RC
CG
WST
CRU
Host
PC
IDE Bus
No.
Pin Name
I/O
Pin Function
−
Digital GND
I
Writing control signal at abnormality
I/O Drive active and slave present signal (open drain)
I
Chip select input of host interface
I
Chip select input of host interface
I
Address signal input of host interface
I
Address signal input of host interface
I/O Diagnostic signal (open drain)
I
Address signal input of host interface
O
16 bit I/O signal (open drain) It becomes 3-state pin during Ultra DMA burst
11
HINTRQ
O
Interrupt signal output to the host (3-state, open drain)
12
DVDD33
−
3.3V positive power supply for digital
13
DGND
−
Digital GND
14
HDMACK
I/O DMA acknowledge signal
15
IORDY
O
I/O channel ready (open drain) It becomes DDMARDY: DSTROBE signal and 3-state pin during Ultra DMA
burst.
16
DIOR
I/O Read input signal of host interface It becomes HDMARDY: HSTROBE signal during Ultra DMA burst.
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