Pioneer CDJ 1000MK3 - Professional CD/MP3 Turntable, Руководство по обслуживанию

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CDJ-1000MK3
104
1 2 3 4
1 2 3 4
C
D
F
A
B
E
No. Pin Name Signal Name I/O Pin Function
1 I/O DCI N.C.
−
Not used
2 I/O DCI TI_XCS O
DSP (IC401) chip select signal
3 VCCO V+3R3
−
Power supply for I/O
4 IO/VREF TI_XHDS1 O DSP (IC401) data strobe signal
5 I/O DMA_XRST I
FPGA reset input
6 I/O ATADREQ I ATADMA request signal
7 I/O ATAWR O ATA write signal
8 I/O ATARD O ATA read signal
9 GND GND
−
Ground
10 I/O ATARDY I
ATA ready signal
11 I/O ATADACK O ATADMA acknowledge signal
12 I/O ATAA1 O ATA address bus
13 I/O ATAA0 O
ATA address bus
14 I/O ATAA2 O
ATA address bus
15 I/O ATACS0 O
ATA chip select 0
16 GND GND
−
Ground
17 I/O ATACS1 O ATA chip select 1
18 IO/VREF ATA15 I/O ATA data bus
19 VCCO V+3R3
−
Power supply for I/O
20 IO/VREF ATA0 I/O
ATA data bus
21 I/O ATA14 I/O
ATA data bus
22 GND GND
−
Ground
23 I/O ATA1 I/O
ATA data bus
24 IO/VREF ATA13 I/O
ATA data bus
25 I/O ATA2 I/O
ATA data bus
26 I/O ATA12 I/O ATA data bus
27 I/O ATA3 I/O ATA data bus
28 I/O ATA11 I/O ATA data bus
29 GND GND
−
Ground
30 I/O ATA4 I/O ATA data bus
31 I/O ATA10 I/O
ATA data bus
32 I/O ATA5 I/O
ATA data bus
33 I/O ATA9 I/O
ATA data bus
34 VCCO V+3R3
−
Power supply for I/O
35 I/O DCI ATA6 I/O ATA data bus
36 I/O DCI ATA8 I/O ATA data bus
37 M1 V+2R5FPGA I Configuration mode setting (connect to 2.5V)
38 M0 V+2R5FPGA I Configuration mode setting (connect to 2.5V)
39 M2 V+2R5FPGA I Configuration mode setting (connect to 2.5V)
40 I/O DUAL ATA7 I/O
ATA data bus
41 I/O DUAL DIS_DIN O
FL microcomputer (IC1002) data output
42 GND GND
−
Ground
43 VCCO V+3R3
−
Power supply for I/O
44 IO/VREF DIS_XCS I FL microcomputer (IC1002) chip select input
XC3S50-4TQG144C (MAIN ASSY : IC301)
• FPGA (Field Programmable Gate Array)
Pin Function