15-16
15-16
U15: UDA1355H IC Specification
MGU826
COMB
FILTER
DECI-
MATOR
AUDIO
FEATURE
PROCESSOR
NOISE
SHAPER
INTER-
POLATOR
AUDIO
FEATURE
PROCESSOR
INPUT
AND
OUTPUT
SELECT
ADC
XTAL
CLOCK AND
TIMING
DATA IN
CONTROL
INTERFACE
IEC 60958
DECODER
ADC
DAC
DAC
DATA OUT
IEC 60958
ENCODER
SLICER
13
40
42
44
9
8
10
5
7
9
1
8
1
7
1
0
2
1
3
0
3
9
2
14
34
36
16
43
2
3
1
23
24
25
26
21
22
4
33
35
28
12
VDDX
XTALIN
XTALOUT
VINL
VINR
RESET
RTCB
WSI
DATAI
BCKI
SPDIF0
SPDIF1
SPDIF2
SPDIF3
SLICER_SEL0
SLICER_SEL1
LOCK
VOUTL
VOUTR
MUTE
WSO
DATAO
BCKO
SPDIFOUT
VSSX VADCP VDDA2 CLK_OUT
VSSA1
VSSE
VADCN
VSSA2
VSSIS
MP0
MP1
MP2
SEL_STATIC
MODE2
MODE1
MODE0
VDDI
VREF
VDDE
VDDA1
15
32
37
27
38
6
39
11
41
UDA1355H
BLOCK DIAGRAM
PINNING
SYMBOL
PIN
PAD
(1)
DESCRIPTION
BCKI
1
bpt4mtht5v
bit clock input (master or slave)
WSI
2
bpt4mtht5v
word select input (master or slave)
DATAI
3
iptht5v
digital data input
LOCK
4
op4mc
PLL lock indicator output
SPDIFOUT
5
op4mc
SPDIF output
V
DDE
6
vdde
digital pad supply voltage
V
SSE
7
vsse
digital pad ground
DATAO
8
ops5c
digital data output
WSO
9
bpt4mtht5v
word select output (master or slave)
BCKO
10
bpt4mtht5v
bit clock output (master or slave)
CLK_OUT
11
op4mc
clock output; 256f
s
or 384f
s
V
DDX
12
vddco
crystal oscillator and PLL supply voltage
XTALIN
13
apio
crystal oscillator input
XTALOUT
14
apio
crystal oscillator output
V
SSX
15
vssco
crystal oscillator and PLL ground
RESET
16
ipthdt5v
reset input
MODE0
17
apio
mode selection input 0 for static mode or microcontroller mode (grounded
for I
2
C-bus)
MODE1
18
bpts5tht5v
mode selection input 1 for static mode or AO address input and output for
microcontroller mode
MODE2
19
bpts5tht5v
mode selection input 2 for static mode or U_RDY output for microcontroller
mode
SEL_STATIC
20
apio
selection input for static mode, I
2
C-bus mode or L3-bus mode
SLICER_SEL0
21
bpts5tht5v
SPDIF slicer selection input 0 for static mode and USER bit output for
microcontroller mode
SLICER_SEL1
22
bpts5tht5v
SPDIF slicer selection input 1 for static mode and AC3 preamble detect
output for microcontroller mode
SPDIF0
23
apio
SPDIF input 0
SPDIF1
24
apio
SPDIF input 1
SPDIF2
25
apio
SPDIF input 2
SPDIF3
26
apio
SPDIF input 3
V
DDI
27
vddi
digital core supply voltage
V
SSIS
28
vssis
digital core ground
MP0
29
apio
multi-purpose pin 0: frequency select for static mode, not used for
microcontroller mode
MP1
30
iptht5v
multi-purpose pin 1: SFOR1 for static mode, SCL for I
2
C-bus mode and
L3CLOCK for L3-bus mode
MP2
31
iic400kt5v
multi-purpose pin 2: SFOR0 for static mode, SDA for I
2
C-bus mode and
L3DATA for L3-bus mode
V
ADCP
32
vddco
positive ADC reference voltage
V
ADCN
33
vssco
negative ADC reference voltage
VINL
34
apio
ADC left channel input
V
SSA2
35
vssco
ADC ground
VINR
36
apio
ADC right channel input
V
DDA2
37
vddco
ADC supply voltage
V
REF
38
apio
reference voltage for ADC and DAC
V
DDA1
39
vddco
DAC supply voltage
VOUTL
40
apio
DAC left channel output
V
SSA1
41
vssco
DAC ground
VOUTR
42
apio
DAC right channel output
RTCB
43
ipthdt5v
test control input
MUTE
44
iipthdt5v
DAC mute input
SYMBOL
PIN
PAD
(1)
DESCRIPTION
Содержание HTS5120/98
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Страница 44: ...Main Unit Decoder Board Layout Diagram TOP Layout Diagram BOTTOM Layout Diagram 15 17 15 17 ...
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Страница 63: ...Revision List Revision List Version 1 0 Initial Release Version 1 1 Addition of HTS5120 78 17 1 ...