A
A
B
B
C
C
D
D
E
E
1
1
2
2
3
3
4
4
Close to Pin37 of U4
BYTE#
Important power supply!
Close to Vaddis!
OPEN
AMD/SST
SDRAM configuration:
1X16Mbit: CS0# = Low;
1X64Mbit: CS1# = Low; CS0#=BA1
SDRAM speed <=7ns
Tras <=44.4ns
Trp <=22.2ns
OPU: 313A HD65
R5: 22K 11K
R6: 33K 18K
EEPROM
R39
JP3
CLOSE
NM
Intel
Close to Vaddis!
NC
Close to
Vaddis
NC
Flash speed <= 70 nS.
If plan to use 90ns
Flash, it needs to be
verified by s/w.
Vaddis 9
OPEN
Close to
Vaddis
Place de-coupling capacitors close to power pins.
0R
Use it to connect the shell of the crystal with ground.
R40
OPEN
A19
OPEN
BOOTSEL
CLOSE
MUX GPIOs
0R
SW debug
Flash select
Crystal
MUX GPIOs
JP2
RY/BY#
UART
NM
Play
Download
RESET
C10
C11
C12
C15
C154
C189
C19
C190
C191
C192
C193
C194
C2
C20
C201
C202
C205
C206
C21
C22
C23
C24
C25
C26
C27
C28
C29
C3
C30
C31
C32
C33
C34
C35
C36
C37
C38
C39
C4
C43
C44
C45
C48
C49
C5
C50
C51
C6
C7
C8
C9
CN10
CN109
D1
EC1
EC20
EC4
EC9
FB1
FB3
FB30
FB4
FB6
FB7
FB8
FB9
JP2
JP3
Q1
R1
R10
R12
R13
R14
R15
R19
R2
R20
R21
R22
R223
R224
R225
R226
R227
R228
R229
R23
R230
R231
R235
R238
R24
R244
R245
R246
R25
R26
R27
R28
R3
R30
R33
R34
R35
R36
R37
R38
R39
R4
R40
R41
R42
R5
R56
R6
R7
R8
R9
U1A
U2
U3
U4
U5
Y1
A2
A2
A2
C3
C2
C1
A2
C1
C1
C1
C1
C1
A3
A2
B3
C2
D2
D1
A2
A2
A2
C1
C1
C1
C1
C1
C1
A3
C1
B1
B1
B1
B1
C1
C1
B3
D1
D1
A3
E1
C4
A3
A1
C1
A3
C1
B1
A3
A2
A2
A2
C4
C4
E1
A3
C3
C1
E1
A3
D1
B3
D1
C1
C2
C2
C2
A2
A2
E1
A3
C2
D2
D1
D1
D1
C2
B3
C2
C2
C2
C3
C3
C3
B4
B4
B4
B4
C2
B4
B4
D1
D1
D2
C2
C2
C2
D2
D2
D2
D2
B1
C3
E1
E1
E1
E1
C4
C4
A1
B1
A1
A2
A2
B1
C3
B1
B1
B1
B1
B1
A4
A4
A1
C4
D1
WPC
ON
MEMD
AT
9
MEMAD
D
0
MEMADD12
MEMADD13
SLED_S
RA
M
A
DD2
RA
M
W
E
-
MD
_
C
D
RA
M
D
A
T
2
DUPTD1
SPD
L
_
SEN
S+
RA
M
D
A
T
4
RA
M
A
DD2
VDDAFE
MEMC
S0
#
VDDDAC
WPCON
APWM_L1-
OSCIN
DUPRD1
RA
M
D
A
T
2
I2C_DAT
RA
M
D
A
T
4
MEMADD16
MEMDAT6
RA
M
D
A
T
5
V2
MEMD
AT
1
FPC_DOUT
STBY_KEY
RA
M
C
K
E
MEMADD10
RA
M
D
A
T
15
FOCUS_S
RAMADD3
RA
M
A
DD5
DUPRD0
RA
M
D
A
T
15
R
A
MC
AS-
FPC_CLK
OSCIN
MEMDAT14
R
A
MR
AS-
RA
M
D
A
T
8
RA
M
W
E
-
RF
_A
RA
M
C
S
1
-
MEMDAT13
PC
L
K
MEMADD18
LD_DV
D
MEMADD6
RAMADD6
T
R
AC
K_
PWM
RA
M
A
DD9
CVBS_C
MEMADD15
VO
C
A
L
_
D
ET
VDDPLL
RA
M
D
A
T
13
R
G
B/
YU
V_
SW
MEMADD14
LD_CD
RA
M
C
S
0
-
RA
M
D
A
T
1
RA
M
A
DD5
R
A
MC
AS-
RAMADD5
IP
CLK
MEMCS0#
RA
M
A
DD1
RA
M
A
DD1
DUPRD0
RA
M
D
A
T
0
V
DDA
F
E
MEMADD8
MEMWR#
MEMDAT0
MEMDAT11
RF
_D
VDDPLL
MEMDAT8
IN_OUT_SW
RA
M
W
E
-
DSPVCC33
ABCLK
MEMADD15
CVBS_C_Y
MEMD
AT
8
RA
M
D
A
T
5
I2C_CLK
MEMADD2
RA
M
A
DD11
RA
M
D
Q
M
MEMADD4
VDD1AFE
RA
M
D
A
T
14
RA
M
D
A
T
10
RA
M
A
DD8
RA
M
D
A
T
4
MEMDAT6
FS3
MEMDAT5
RA
M
A
DD8
RA
M
D
A
T
14
RESET#
MEMADD10
RA
M
D
Q
M
RA
M
B
A
RA
M
A
DD0
RAMADD4
ML
MEMADD1
SDRAM3.3V
R
A
MR
AS-
MEMDAT12
RA
M
D
A
T
1
MEMADD17
MEMWR#
LE
D/P
CO
N
I2C_DA
T
CD_DVD
MEMADD18
DUPTD1
RA
M
D
A
T
2
RA
M
D
A
T
3
M
IC_V
O
C
A
L
MEMDAT13
V1
F
O
CUS
_P
W
M
SDRAM3.3V
MEMADD7
RA
M
C
K
E
RA
M
A
DD9
V2
PCLK
RA
M
D
A
T
11
MEMD
AT
0
S/PDIF_OUT
VDDPWM
MEMDAT9
MEMADD8
RA
M
D
Q
M
OSCOUT
MEMDAT7
RA
M
D
A
T
6
DUPTD0
RF
P
RF
I2C_CLK
V1
MEMDAT11
RA
M
D
A
T
5
DUPRD1
MEMDAT7
FS1
MEMADD5
V
DD1A
F
E
RA
M
D
A
T
14
MEMADD13
MEMADD2
RF
_C
RA
M
D
A
T
12
RA
M
A
DD7
SL
ED
_
P
WM
VC
AOUT0
RA
M
D
A
T
0
SPD
L
_
SEN
S-
AMCLK
MEMADD2
R
A
MR
AS-
RA
M
C
S
0
-
RF
N
MEMADD19
MEMADD9
MEMDAT15
R
A
MC
AS-
RA
M
A
DD10
RA
M
D
A
T
7
RAMADD1
CLOSE
RA
M
D
A
T
15
RA
M
D
A
T
12
RA
M
D
A
T
7
RA
M
D
A
T
9
RA
M
D
A
T
3
MEMADD16
RA
M
A
DD8
HOMESW
MEMDAT4
RA
M
A
DD7
MEMDAT1
MEMADD4
RA
M
A
DD0
RA
M
A
DD10
RA
M
D
A
T
0
C_B_U
DUPTD0
RA
M
D
A
T
1
RA
M
A
DD6
RA
M
A
DD11
SPD
L
_
P
WM
V
DDP
W
M
RA
M
A
DD4
RA
M
D
A
T
11
MEMDAT2
INSW
MEMRD#
OPEN
DSPVCC33
MD
_
D
VD
RA
M
A
DD3
RA
M
D
A
T
10
OSCOUT
IRRCV
FS2
MEMADD11
MEMADD5
RA
M
D
A
T
11
RF
_E
CVBS_G_Y
RA
M
D
A
T
8
MEMADD11
MUTE_CTL
I2C_CLK
RA
M
A
DD6
APWM_L-
I2C_DAT
DUPTD0
SPDL_S
RA
M
D
A
T
6
V3
VR
EF
RA
M
D
A
T
9
DA
C_RS
T
#
MEMADD6
RAMADD7
RA
M
D
A
T
7
MI
C
_
O
N
DUPTD1
RA
M
D
A
T
12
VDDDAC
RA
M
D
A
T
6
Y_R_V
MEMDAT2
RA
M
B
A
RA
M
B
A
MEMDAT4
MEMADD9
RF
_B
RA
M
D
A
T
3
FPC_STB
V
DDA
F
E
RA
M
D
A
T
10
ALRCLK
MEMADD12
RA
M
D
A
T
13
RA
M
A
DD4
MEMADD3
V3
TRACK_S
DAC_RST#
RA
M
A
DD10
MEMDAT12
RA
M
A
DD3
RA
M
C
S
0
-
MEMDAT10
MEMDAT15
RA
M
D
A
T
13
MEMDAT14
MEMADD7
DUPRD0
DUPRD1
RA
M
D
A
T
9
MEMADD19
DRVSB
RF
_F
RA
M
C
S
1
-
MEMDAT3
ML
MEMDAT10
R
ESO
U
T
MEMADD3
LED/PCON
RA
M
D
A
T
8
RA
M
A
DD0
RA
M
A
DD9
MEMDAT3
RA
M
D
Q
M
VDDDAC
RAMADD2
MEMADD1
PC
L
K
AIN
MEMDAT5
MEMADD1
MEMADD0
MEMADD14
SDRAM3.3V
RA
M
D
Q
M
ST
BY_
KEY
MEMR
D
#
APWM_L1-
MEMADD17
IRRCV
RESET#
DSPVCC33
IRRCV
INSW
MI
C
_
O
N
I2C_DAT
RF
_D
ML
FPC_CLK
VC
S/PDIF_OUT
SPD
L
_
SEN
S+
HOMESW
CD_DVD
RF
C_B_U
DAC_RST#
CVBS_G_Y
FS2
I2C_CLK
MD
_
C
D
RF
_B
MUTE_CTL
TRACK_S
APWM_L-
FPC_STB
FS1
CVBS_C_Y
CVBS_C
IN_OUT_SW
RF
_A
R
G
B/
YU
V_
SW
LED/PCON
Y_R_V
RF
_C
FPC_DOUT
MD
_
D
VD
DRVSB
RF
_F
RF
_E
FS3
OPEN
CLOSE
SPD
L
_
SEN
S-
VO
C
A
L
_
D
ET
FOCUS_S
LD_DV
D
AIN
SLED_S
M
IC_V
O
C
A
L
AOUT0
APWM_R-
AMCLK
ABCLK
STBY_KEY
ALRCLK
SPDL_S
LD_CD
DSPVCC33
DSPVCC33
DSPVCC18
DSPVCC33
DSPVCC33
DSPVCC33
DSPVCC33
DSPVCC33
DSPVCC33
DSPVCC33
DSPVCC33
DSPVCC33
DSPVCC18
DSPVCC33
DSPVCC33
DSPVCC18
DSPVCC33
SERVO33
DSPVCC33
R3
51K
C3
10nF
U4
SST39VF800
[39VF400/800/160]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A15
A14
A13
A12
A11
A10
A9
A8
NC
A20
WE#
RP#
VPP
WP#
A19
A18
A17
A7
A6
A5
A4
A3
A2
A1
A16
VCCQ
GND
DQ15
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
GND
CE#
A0
R27
10K [NM]
R25
10K [NM]
+
EC20
NM
[220uF/16V]
R238
4.7R
C7
10nF
R35
10K
R9
100R
R5
22K
+
EC4
100uF/16V
C37
10pF
[NM]
C31
1nF
CN10
HYPER_TERMINAL I/F
[NM]
1
2
3
4
C19
10nF
FB4
500Z
C26
10nF
C44
NM
[0.1uF]
R223
NM [0R]
C194
33pF
R33
330R
C201
0.1uF
C38
22pF
C25
10nF
C202
1nF
C24
10nF
FB3
500Z
C4
10nF
R56
0R
[4.7R]
R41
1K
[NM]
C8
10nF
R231
10K
[NM]
CN109
DOWN_LOAD_I/F
[NM]
1
2
3
4
C2
10nF
C193
33pF
EC9
10uF/16V
R19
75R 1%
R228
10K
[NM]
Y1
27.000MHz
Third overtone
R230
10K
[NM]
R37
2K
JP3
BOOTSEL1[NM]
R39
0R
C15
10nF
R24
0R
R1
4.7K
R10
392 Ohm 1%
C28
10nF
R42
1K
[NM]
C29
10nF
C49
0.1uF
FB6
500Z
C192
33pF
R34
10K
C205
1nF
R20
75R 1%
R7
15.4K
1%
C32
1nF
C11
10nF
FB1
500Z
JP2
BOOTSEL1[NM]
C154
100p
FB9
75Z
+
EC1
47uF/16V
C191
33pF
R36
100R
R21
75R 1%
C35
1nF
C12
10nF
R26
10K [NM]
C206
NM
[20p]
FB8
75Z
C48
10nF
C33
27nF
C45
22pF
[NM]
U5
NM
[24LC02 ]
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
C20
10nF
C50
33pF
C190
33pF
R22
75R 1%
R14
220K
R2
75R
Q1
BT3904
U2
16Mbit: K4S161622C-TC/L70
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
VD
D
DQ
0
DQ
1
VSSQ
DQ
2
DQ
3
V
DDQ
DQ
4
DQ
5
VSSQ
DQ
6
DQ
7
V
DDQ
LDQ
M
WE
CA
S
RA
S
CS
BA
A
10/A
P
A0
A1
A2
A3
VD
D
VSS
DQ
15
DQ
14
VSSQ
DQ
13
DQ
12
V
DDQ
DQ
11
DQ
10
VSSQ
DQ
9
DQ
8
V
DDQ
NC
UDQ
M
CLK
CK
E
NC
A9
A8
A7
A6
A5
A4
VSS
C36
1nF
C9
10nF
R244
NM [0R]
C6
10nF
C30
0.1uF
FB7
75Z
R245
NM [0R]
R227
10K
[NM]
R4
51K
R235
4.7R
C22
10nF
R246
NM [0R]
C5
10nF
C189
33pF
R40
NM
R23
75R 1%
C34
1nF
U1A
ZR36966
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
178
176
179
177
174
175
173
180
181
161
172
163
170
171
167
168
165
166
162
159
160
169
164
158
157
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
49
48
50
51
53
52
54
55
57
56
58
59
61
60
62
63
65
64
66
67
69
70
71
72
68
73
74
76
75
77
78
80
79
81
82
84
83
85
86
89
87
90
91
92
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
44
45
46
47
88
93
94
95
96
97
98
99
100
101
102
103
104
43
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
V
DDP
GP
IO[9]/M
E
M
DA
T[9]
MEMD
AT
[1
]
GP
IO[8]/M
E
M
DA
T[8]
MEMD
AT
[0
]
MEMR
D
#
MEMC
S0
#
MEMAD
D
[0
]
GP
IO[63]/M
E
M
CS
2#
GP
IO[62]/FCU_IORD#
GP
IO[61]/FCU_IOW
R#
GP
IO[60]/FCU_S
CLK
GP
IO[59]/FCU_CS
2#
GP
IO[58]/FCU_CS
3#
GP
IO[57]/FCU_W
A
IT#
GP
IO[56]/FCU_RS
T
IGP
IO[55]/FCU_IRQ
G
NDC
V
DDC
IGP
IO[54]/P
W
M
CO[5]
GP
IO[53]/P
W
M
CO[4]
GP
IO[52]/P
W
M
CO[3]
GP
IO[51]/P
W
M
CO[2]
G
NDP
W
M
GP
IO[50]/P
W
M
CO[1]
V
DDP
W
M
GP
IO[49]/P
W
M
CO[0]
CD_M
D
G
NDRE
F
DV
D_M
D
VD
D
SAF
E
VR
EF
R
ESO
U
T
VC
CD_LD
DV
D_LD
B
G
ND1A
F
E
C
G
H
K
F
J
E
V
DDA
F
E
V
DD1A
F
E
A
G
NDA
F
E
D
RF
N
RF
P
MEMDAT[2]
MEMDAT[10]/GPIO[0]
MEMDAT[3]
MEMDAT[11]/GPIO[1]
MEMDAT[4]
MEMDAT[12]/GPIO[2]
MEMDAT[5]
MEMDAT[13]/GPIO[3]
MEMDAT[6]
MEMDAT[14]/GPIO[4]
GNDC
MEMDAT[7]
MEMDAT[15]
VDDC
VDDP
MEMADD[16]
MEMCS1#/GPIO[5]
MEMADD[15]
MEMADD[14]
MEMADD[13]
MEMADD[12]
MEMADD[11]
MEMADD[10]
MEMADD[9]
MEMADD[8]
MEMWR#
MEMADD[18]/GPIO[6]
MEMADD[17]
MEMADD[7]
MEMADD[6]
GNDC
MEMADD[5]
MEMADD[4]
MEMADD[3]
VDDP
MEMADD[2]
MEMADD[1]
MEMADD[19]/IGPIO[7]
USBVDD
USBDP/GPO[67]
USBDN/GPO[68]
USBGND
RAMADD[6]
RAMADD[2]
RAMADD[1]
RAMADD[7]
RA
M
A
DD[0]
VDDC
RA
M
A
DD[8]
RA
M
A
DD[10]
G
NDC
V
DDP
RA
M
A
DD[9]
RA
M
A
DD[11]/G
P
O
[64]
RA
M
B
A
RA
M
C
S
0
#
RA
M
C
S
1#/G
P
O
[65]
R
A
MR
AS#
V
DDP
R
A
MC
AS#
G
NDC
RA
M
W
E
#
G
NDP
CLK
PC
L
K
V
DDP
CLK
RA
M
D
A
T
[8]
RA
M
D
Q
M
RA
M
D
A
T
[7]
RA
M
D
A
T
[9]
V
DDP
RA
M
D
A
T
[6]
G
NDC
RA
M
D
A
T
[10]
RA
M
D
A
T
[11]
RA
M
D
A
T
[5]
RA
M
D
A
T
[4]
RA
M
D
A
T
[12]
V
DDP
RA
M
D
A
T
[3]
G
NDC
RA
M
D
A
T
[13]
RA
M
D
A
T
[14]
RA
M
D
A
T
[2]
RA
M
D
A
T
[1]
RA
M
D
A
T
[15]
RA
M
D
A
T
[0]
GNDDACBS2
RSET
DAC1
VDDDAC
DAC2
DAC3
VDDDAC
DAC4
GNDDAC_D
DAC5
XIN
XO
VDDPLL
GNDPLL
RESET#
GNDC
VDDC
GPIO[48]/DUPRD1
GPIO[47]/DUPTD1
GPIO[46]/DUPRD0
GPIO[45]/PWMCO[5]/DUPTD0
VDDP
IGPIO[44]
GPIO[43]/TDO
GPIO[42]/TCK
GPIO[41]/TDI/NMI
GPIO[40]
GPIO[39]
GPIO[38]
IGPIO[37]/TMS/NMI
GPIO[36]
GPIO[35]
GPIO[34]/RAMCKE/SPDIFIN
GPIO[33]/AIN/SPDIFIN
GPIO[32]/SPDIFO
GPIO[31]/ABCLK
GPIO[30]/ALRCLK
VDDP
GPIO[29]/AMCLK
GNDC
GPIO[28]/AOUT[0]/APWM0-
GPIO[27]/APWM0+
GPIO[26]/AOUT[1]/APWM1-
GPIO[25]/APWM1+
GPIO[24]/AOUT[2]/APWM2-
IGPIO[23]/APWM2+
GNDAPWM
GPIO[22]/AOUT[3]/APWM3-
GPIO[21]/APWM3+
GPIO[20]/APWM4-
GPIO[19]/PWMCO[5]/APWM4+
VDDAPWM
RAMADD[3]
RAMADD[5]
VDDIP
GNDC
V
DDC
V
DDP
R
A
M
D
QM
2
/R
A
M
C
K
E
/GP
O[6
6
]
G
NDC
R
AMC
KE/
SD
I_
PSC
/G
PI
O
[1
0
]
G
PAI
O
/I
G
PI
O
[1
1
]
APWM7
+/
GPI
O[
1
2
]
APWM7
-/
GPI
O[
1
3
]
APWM6
+/
GPI
O[
1
4
]
APWM6
-/
GPI
O[
1
5
]
APWM5
+/
GPI
O[
1
6
]
APWM5
-/
GPI
O[
1
7
]
A
IN/S
P
D
IFIN/IO[18]
RAMADD[4]
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
C10
10nF
D1
LL4148
C51
0.1uF
R226
10K
[NM]
R15
75R
C21
10nF
R13
75R
C27
10nF
R229
10K
[NM]
R38
2K
C23
10nF
R12
NM [0R]
C39
22pF
R225
0R[NM]
FB30
500Z
U3
NM
[64Mbit:K4S641632H-UC70]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
VD
D
DQ
0
V
DDQ
DQ
1
DQ
2
VSSQ
DQ
3
DQ
4
V
DDQ
DQ
5
DQ
6
VSSQ
DQ
7
VD
D
DQ
M
L
WE#
C
AS#
R
AS#
CS
#
BA0
BA1
A1
0
A0
A1
A2
A3
VD
D
VSS
A4
A5
A6
A7
A8
A9
A1
1
NC
CK
E
CLK
DQ
M
H
NC
VSS
DQ
8
V
DDQ
DQ
9
DQ
10
VSSQ
DQ
11
DQ
12
V
DDQ
DQ
13
DQ
14
VSSQ
DQ
15
VSS
R30
15K
R28
33R [NM]
R224
4.7K
[NM]
C43
0.22uF
R8
100R
R6
51K
6-13
6-13
Main Board Electric Diagram for DVP3142(K/KM)/XX,DVP3144(k)/XX: Vaddis_SDRAM_Fla
Содержание DVP3112
Страница 37: ...6 5 6 5 Power Board Print Layout Bottom Side for DVP3140 XX DVP3142 K KM XX DVP3144 XX ...
Страница 38: ...Power Board Print Layout Bottom Side for DVP3144 K 55 6 6 6 6 ...
Страница 43: ...6 11 6 11 Main Board Print Layout Top Side for DVP3140 XX ...
Страница 44: ...6 12 6 12 Main Board Print Layout Bottom Side for DVP3140 XX ...
Страница 49: ...Main Board Print Layout Top Side for DVP3142 K KM XX DVP3144 k XX 6 17 6 17 ...
Страница 50: ...6 18 6 18 Main Board Print Layout Bottom Side for DVP3142 K KM XX DVP3144 k XX ...
