Philips DVDR3588H, Руководство по обслуживанию

Страница: 29 / 59

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
(FP SCLK)
E5_SDRAM_CS1
(RDY_FM)
(POWER DOWN LOADER)
1.8V
5V
3.3V
2.5V
(Reset Audio and BTSC)
(FP D_FM)
(FP D_HOST)
(FLASH)
(ATN_FM)
General decoupling cap placement:
Caps with smaller capacitance values to be
closer to respective power pins compared to
those of larger values. All should be as
close as possible.
(Input only)
(Input only)
(/RST_PHY)
(BIO_PHY_PD)
(VI_AVID)
(INT_VI) (MUTE)
(/RST_VI)
JTAG HEADER
(Ain_Sel1)
(Ain_Sel2)
(SCART)
(SCART)
10P
24
D
D
A
A
A
A
B
B
B
B
B
B
B
C
C
C
C
C
D
B
B
C
C
C
C
C
D
C
A
A
C
C
B
B
B
C
C
A
D
D
D
D
D
D
D
C
D
C
D
C
D
C
D
C
D
D
D
D
D
A
B
C
C
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
D
D
D
A
B
B
B
C
C
C
B
C
C
C
D
A
D
D
D
D
D
A
A
D
A
D
A
A
A
D
2
2
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
3
3
4
4
4
4
4
4
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
3
4
3
4
4
4
1
2
1
1
1
1
1
1
1
1
1
1
1
1
2
3
1
1
3
4
4
4
4
4
4
4
4
4
4
4
1
2
2
2
2
1
3
3
3
1
1
3
3
3
1
C3
C4
C5
C7
C8
C10
C11
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C33
C36
C38
C39
C40
C41
C42
C43
C48
C6
C9
C30
C31
C32
C34
C35
C47
R35
R30
R2
R4
R9
R14
R17
R1
R3
R5
R6
R7
R8
R10
R11
R12
R13
R15
R16
R31
R32
R33
R36
CE3
CE4
CE5
CE7
Y1
C2
C1
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R34
CE1
C285
CE2
C12
C13
C14
C27
C28
C29
C37
C44
C45
C46
X2
U1
L1
L2
L3
L4
FB1
D1
D2
J9
SKT-U1
RX1
TP1
TP2
TP3
TX1
/E5_CS2
ATAPI1_DATA7
ATAPI1_DATA4
ATAPI1_DATA6
ATAPI1_DATA2
ATAPI1_DATA5
ATAPI1_DATA1
ATAPI1_DATA3
ATAPI1_ADD3
ATAPI1_ADD1
ATAPI1_ADD0
ATAPI1_ADD2
ATAPI1_DATA15
ATAPI1_ADD4
ATAPI1_DATA10
ATAPI2_ADD0
ATAPI2_ADD1
ATAPI1_DATA9
ATAPI2_ADD3
ATAPI2_ADD4
ATAPI1_DATA8
ATAPI1_DATA0
ATAPI2_ADD2
ATAPI2_DATA14
ATAPI2_DATA15
ATAPI2_DATA13
ATAPI2_DATA1
ATAPI2_DATA0
ATAPI2_DATA2
ATAPI2_DATA3
ATAPI2_DATA4
ATAPI2_DATA5
ATAPI2_DATA7
ATAPI2_DATA6
ATAPI2_DATA8
ATAPI2_DATA9
ATAPI2_DATA11
ATAPI2_DATA10
ATAPI2_DATA12
ATAPI1_DATA13
ATAPI1_DATA14
ATAPI1_DATA11
ATAPI1_DATA12
E5_GPIO7
E5_GPIOx34
E5_GPIO3
E5_GPIOx31
VI_CLK0
AO_2
AO_3
AO_0
AO_1
CLK_E5_CLKX
CLK_E5_CLKI
E5_UART2_TX
E5_UART2_RX
HD2
VO_HSYNC
VO_VSYNC
E5_GPIO4
VI_VSYNC
E5_SPI
_M
OSI
MCONFIG
E5_GPIO4
E5_GPIO5
E5_GPIOx35
E5_GPIO0
E5_GPIO1
MCONFIG
/E5_CS0
/E5_CS2
NC1
NC2
E5_SDRAM
_D
Q
0
E5
_
S
DRAM
_
DQ4
E5
_
S
DRAM
_
DQ1
E5_SDRAM
_D
Q
2
E5_SDRAM
_D
Q
3
E5
_
S
DRAM
_
DQ8
E5_SDRAM
_D
Q
5
E5_SDRAM
_D
Q
7
E5
_
S
DRAM
_
DQ6
E5_SDRAM
_D
Q
10
E5
_
S
DRAM
_
DQ1
1
E5_SDRAM
_D
Q
12
E5_SDRAM
_D
Q
9
NC3
E5_SDRAM
_D
Q
16
E5_SDRAM
_D
Q
15
E5
_
S
DRAM
_
DQ1
3
E5_SDRAM
_D
Q
14
E5_SDRAM
_D
Q
17
E5_SDRAM
_D
Q
19
E5
_
S
DRAM
_
DQ1
8
E5
_
S
DRAM
_
DQ2
0
E5_SDRAM
_D
Q
22
E5_SDRAM
_D
Q
24
E5_SDRAM
_D
Q
21
E5
_
S
DRAM
_
DQ2
3
E5
_
S
DRAM
_
DQ2
7
E5_SDRAM
_D
Q
28
E5_SDRAM
_D
Q
26
E5
_
S
DRAM
_
DQ2
5
E5_SDRAM
_D
Q
31
E5_SDRAM
_D
Q
29
E5
_
S
DRAM
_
DQ3
0
E5_V5BIAS
NC4
HD4
HD6
HD14
HD3
HD13
HD15
HD9
HD1
HD8
HD10
HD5
HD0
HD12
HD7
HD11
NC4
NC2
NC3
E5_AO_MCLKO
VO_ACTIVE
E5_GPIO5
NC1
VI_D2
VI_D5
VI_D9
E5_GPIOx35
E5_AI_FSYNC
E5_AI_SCLK
E5_AI_MCLKO
E5_TDO
E5_TCK
E5_TMS
E5_TDI
E5_TRST_L
VOE
VI_D3
VI_D4
VI_D6
VI_D7
VI_D8
E5_TDO
E5_TRST_L
E5_TMS
E5_TDI
E5_TCK
E5_AO_SCLK
E5_AO_LRCK
E5_AO_IEC958
E5_GPIOx36
AO_D2
E5_SDRAM
_D
Q
S
2
ATAPI2_DIOR_L
E5_SDRAM
_
C
LK
1
AI_FSYNC
/RST_ATAPI2
VREF
E5_G
P
IO
x4
1
SCL
BI
O
_LI
NK_O
N
E5_SDRAM
_A
14
E5_UART2_T
X
E5_MA5
E5_SDRAM
_
WE#
VI_VSYNC
AO_MCLKO
AO_D1
E5
_
S
DRAM
_
DQM
3
E5_SDRAM
_
A15
E5
_
S
DRAM
_
CL
K#
1
USB_PO0
E5_SPI
_M
IS
O
ATAPI2_INTRQ
E5_MA2
ATAPI1_ADD[4..0]
E5_SDRAM
_C
LK
E
E5_SDRAM
_A
8
AO_SCLK
SDA
E5_GPIOx31
/SYS_RST
E5_SDRAM
_
RAS#
E5
_
S
DRAM
_
DQM
1
E5_SDRAM
_
C
LK
0
AI_SCLK
/RST_ATAPI1
E5
_
S
DRAM
_
CS0
E5_MA3
VI_D[9..2]
E5_G
P
IO
x2
4
AO_FSYNC
BI
O_PHY_DATA3
E5_SI
O
_I
RR
X
E5_SDRAM
_A
9
CVBS_Out
E
5
_
S
PI
_CLK
E5_SDRAM_DQ[31..0]
BI
O_PHY_CT
L1
USB_O
C
0
ATAPI2_DATA[15..0]
ATAPI1_DIOR_L
E5_SDRAM
_A
4
ATAPI2_DMARQ
Y_Out
E5
_
S
DRAM
_
DQS1
E5_G
P
IO
x4
4
E5_MA22
BI
O_PHY_DATA6
BI
O_L
R
E
Q
E5_MA1
E5
_
S
DRAM
_
DQM
0
E5
_
S
DRAM
_
DQS3
AI_MCLKO
E5
_
S
DRAM
_
CL
K#
0
E5_SDRAM
_C
A
S
#
E5_SDRAM
_
A12
C_Out
E5_UART2_RX
ATAPI1_INTRQ
VI_CLK0
/E5_CS0
E5_GPIO7
E5_G
P
IO
x4
2
E5_GPIO0
Pb/B_Out
E5_SDRAM
_
A2
BI
O_PHY_D
A
T
A
0
E5_GPIO3
E5_SDRAM
_
A10
E5_SDRAM
_
A5
E5_SDRAM
_D
Q
S
0
E5_G
PI
O
x25
BI
O
_LPS
BI
O_PHY
_C
LK
BI
O_PHY_D
A
T
A
4
E5_SP
I_
C
S
2
USB_D0-
E5_SDRAM
_A
1
E5_G
P
IO
x3
6
E5_GPIOx35
E5_ALE
E5_G
PI
O
x43
AO_IEC958
Pr/R_Out
E5_SDRAM
_A
11
ATAPI2_DMAACK_L
E5_GPIOx45
E5_SDRAM
_
A7
AO_D0
ATAPI2_IORDY
/E5_OE
BI
O_PHY_DATA1
USB_D
0+
E5_GPIOx34
E5
_
S
DRAM
_
DQM
2
E5_MA4
ATAPI2_ADD[4..0]
E5_GPIO5
AI_D0
/E5_WEL
ATAPI2_DIOW_L
BI
O_PHY_D
A
T
A
2
E5_SDRAM
_A
3
E5_GPIO4
AO_D3
BI
O_PHY_D
A
T
A
7
ATAPI1_DMAACK_L
ATAPI1_IORDY
E5_SDRAM
_A
6
E5_SDRAM
_
A0
BI
O_PHY_CTL0
E5_GPIO1
ATAPI1_DIOW_L
Y/G_Out
E5_SPI
_M
OSI
HD[15..0]
BI
O_PHY_D
A
T
A
5
ATAPI1_DMARQ
E5_V5BIAS
ATAPI1_DATA[15..0]
VO_GND
V18
GND
E5_AVDD
V33
GND
VO_GND
E5_VCORE
GND
GND
GND
E5_AVDD
E5_VPAD
GND
E5_AVDD
E
5
_V5BI
A
S
V18_E5_DAC_DVDD
E5_VDDREF
GND
E5_VDDX
GND
V18_E5_DAC_DVDD
GND
V33
GND
E5_VPAD
SSTL2_VD
D
GND
V33
E5_VDDREF
GND
V33
GND
V33_E5_DAC_AVDD
V33_E5_USB
GND
E5_VDDX
GND
GND
E5_VCORE
V25
E5_VCORE
V33
V33_E5_DAC_AVDD
SSTL2_VDD
GND
V33_E5_USB
V33
E5_VPAD
GND
V33
GND
E5_VDDREF
SSTL2_VDD
GND
GND
GND
R30 4.7K
L3 FBMJ2125HS420-T
C22
0.1UF
C6
0.01UF
C4
0.1UF
C31
0.01UF
C17
0.1UF
TP1 1
+ CE3
10UF/16V
R14 10K
R18 22
C10
0.1UF
R1 10K
C14
1000PF
C37
1000PF
C34
0.01UF
R3 10K
C45
1000PF
R10 10K
R25 22
+
CE7
10UF/1206A
Y1
13.5MHZ
C40
0.1UF
C2
15P
R29 22
R16 10K
D1
IN4148
1
2
R19 22
TP2 1
R13 10K
R24 22
R36
10K
R17 10K R15 10K
C16
0.1UF
C38
0.1UF
C47
0.01UF
R11 10K
C3
0.1UF
R5 10K
C18
0.1UF
C26
0.1UF
D2
IN4148
1
2
C20
0.1UF
C12
1000PF
C29
1000PF
C11
0.1UF
C8
0.1UF
R7 10K
R12 10K
RX1 1
C24
0.1UF
C41
0.1UF
C35
0.01UF
C285
100P
+
CE5
10UF/1206A
C5
0.1UF
+
CE2
100UF/16V
C23
0.1UF
C25
0.1UF
R27 22
FB1
FBMJ2125HS420-T
C33
0.1UF
R32
10K
R26 22
TP3 1
R31
10K
C32
0.01UF
C7
0.1UF
R20 22
R28 22
C44
1000PF
C36
0.1UF
L1 FBMJ2125HS420-T
R23 22
ADDR
DATA
SIO
SDRAM I/F
RST-
MASTER SLAVE
MCONFIG
CS-
RD-
DMAREQ
A0
A1
A2
HINT-
RD
WAIT-
DTACK-
D31
D30
D29
D28
D27
D26
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D4
D3
D2
D1
D0
UDS-
LDS-
PCMCIA_IOW-
PCMCIA_IOR-
WR-
D25
D24
D23
D22
D21
D20
D19
D18
MA[21]
MA[20]
MA[19]
MA[18]
MA[17]
MA[16]
MA[15]
MA[14]
MA[13]
MA[12]
MA[11]
MA[10]
MA[9]
MA[8]
MA[7]
MA[6]
CONTROL
ATAPI2 I/F
ATAPI I/F
SD/CD
SBP
SBP_D[7]
SBP_D[6]
SBP_D[5]
SBP_D[4]
SBP_D[3]
SBP_D[2]
SBP_D[1]
SBP_D[0]
SD_ERROR
SD_SECSTART
SBP_CLK
SBP_REQ
SBP_RD
SBP_ACK
SBP_FRAME
SD_D[0]
SD_D[1]
SD_D[2]
SD_D[3]
SD_D[4]
SD_D[5]
SD_D[6]
SD_D[7]
SD_CLK
SD_ACK
SD_RDREQ
SD_WRREQ
DATA ADDR CONTROL
IDC UART1 UART2 SPI IR
CS10- CS11-
GPIOx[25] GPIOx[24] GPIOx[42] GPIOx[41]
CS7-
GPIOx[39] GPIOx[40] GPIOx[38] GPIOx[37]
HOST I/F
VDENC
0 1 2
CPST Y -
C CPST -
G/Y Y -
B/Pb C CPST
R/Pr C CPST
SEL
PEC
GPIOx[45]
GPIOx[29]
2nd 24-bit
VI_D0
VI_D1
VI_D2
VI_D3
VI_D4
VI_D5
VI_D6
VI_D7
VI_D8
VI_D9
VO_D16
VO_D17
VO_D18
VO_D19
VO_D20
VO_D21
VO_D22
VO_D23
VIO
GPIOx[30]
GPIOx[0]
GPIOx[1]
GPIOx[2]
GPIOx[3]
GPIOx[4]
GPIOx[5]
GPIOx[6]
GPIOx[7]
GPIOx[8]
GPIOx[9]
GPIOx[10]
GPIOx[11]
GPIOx[12]
GPIOx[13]
GPIOx[14]
GPIOx[15]
VOUT
VIN
JTAG
SYSTEM
GPIOx[31]
GPIOx[34]
GPIO[7]
GPIO[6]
AIN
AOUT
GPIOx[35]
CS[9]-
CS[8]-
USB 1394 POWER GND
PADS CORE
SDRAM
SDR
DDR
3.3V
2.5V 5V
BIAS
3.3V 1.8V 3.3V
PLL PLL
VREF
GPIOx[43] GPIOx[44]
DACO
GPIOx[36]
CS6-
GPIOx[23]
GPIOx[22]
GPIOx[21]
GPIOx[20]
GPIOx[19]
GPIOx[18]
GPIOx[17]
GPIOx[16]
CD_DATA
CD_LRCK
CD_BCK
CD_C2PO
vout vin
Y CPST -
TOP VIEW
3.3V ONLY
2nd
VO_D0
VO_D7
VO_D6
VO_D5
VO_D4
VO_D3
VO_D2
VO_D1
vout
VI_D10
VI_D11
VI_D12
VI_D13
VI_D14
VI_D15
20-bit
vin
POWER
3.3V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
3.3v only
GND
DIGITAL
GPIOx[33]
GPIOx[32]
VI_D16
VI_D17
VI_D18
VI_D19
All the singals with * and
the ATAPI-2 I/F are not
available in 308-pin package
NOTE:
E5.1-BGA-388-A
J3
AE19
L4 M4 M3 J2 J1 K3 K2 J4 L3 L2 L1 H3 K1 AC12 AC7 D2
1
C2
1
T16 R1
6
AC13 AC14 AC15 D1
4
D1
5
D1
9
D2
0
P4 R4 T4 AA4 AA23 AC6 AC21 D1
1
D1
2
D1
3
C2
2
D2
3
M2
3
N2
4
P24 R2
4
T24 U2
3
C2
3
L11 L12 L13 L14 L15 L16 M1
1
M1
2
M1
3
M1
4
M1
5
M1
6
N1
1
N1
2
N1
3
N1
4
N1
5
N1
6
P11 P12 P13 P14 P15 P16 R1
1
R1
2
R1
3
R1
4
R1
5
T11 T12 T13 T14 T15
AF5
AE5
AF19
AF18
AF17
AF16
AE6
AC8
AF6
AD7
AE7
AF7
AD9
AC9
AE8
AF8
AD11
AE12
AF11
AC11
AF12
AE13
AE11
AD14
AE15
AD13
AD16
AC16
AE17
AD15
AE16
AD17
D10
Y1
V1
V4
R1
W2
W3
T3
Y2
W1
V3
U4
P1
W4
V2
U2
T2
R3
P2
N1
M1
M2
N2
N3
P3
R2
T1
U1
U3
AF15
AF13
AE18
AC17
AE14
AE10
AE9
AD8
AF9
AF14
AF10
AD10
AD21 AC19 AF22 AE23 AC22 AE24 AC20 AF24 AE20 AF23 AE22 AD22 AF21 AE21 AC18 AD18 AD20 AD19 AF20
D3 D2 D5 D4 B1 B3 C3 C5 C4 B2 D1 C1 C2
Y25 W24 V23 Y26 V24 W26 V25 V26 N2
5
U2
6
R2
6
P26 T25 P25 T26 U2
5
M2
5
M2
4
L26 L25 L23 K26 K25 K24 H2
3
G2
6
H2
4
H2
5
J24 J25 J23 J26 W25 U2
4
R2
5
L24 H2
6
N2
6
M2
6
K23 AC25 AB23 AA24 AC26 AB24 AD25 AD26 AE25 AC23 AF25 AD24 AE26 AC24 AF26 AD23 AB25 AA25 Y24 W23 AA26 N2
3
P23 R2
3
T23 D2
2
G24
G23
F26
G25
F24
E25
F25
E23
D25
A23
B25
E26
D26
E24
D24
C26
B24
A1
A2
H1
H4
C9
D9
B8
A9
B7
D8
C7
C19
B19
B23
B22
A22
B21
C25
B26
C24
A26
B16
C16
D16
B17
C17
D17
B18
C18
A19
D18
B20
A21
A17
A20
C20
A18
A10
B10
B11
A11
C11
C12
B12
A12
B13
A13
C13
C14
B14
A14
A15
C15
B15
C10
B9
C8
A16
AB26 Y23
AD6
AF3
AC5
AE4
AF4
AD5
AD4
AE2
AD3
AC4
AF2
AE3
AF1
AE1
AD2
AC3
AB4
AD1
AC2
AB3
AC1
AB2
AA3
AB1
AA2
Y4
AA1
Y3
E2 E1 G1 G2 F2 F1 G3 G4
A3
B4
A4
B5
A5
A6
C6
A7
D6
AD12
AC10
A24
A25
H2
D7
B6
A8
E4 F4 E3 F3 F23 K4 N4
BI
O_PHY_DATA0
IRRX
BI
O_PHY_DATA1
BI
O_PHY_DATA2
BI
O_PHY_DATA3
BI
O_PHY_DATA4
BI
O_PHY_DATA5
BI
O_PHY_DATA6
BI
O_PHY_DATA7
BI
O_PHY_CTL0
BI
O_PHY_CTL1
BI
O_LREQ
BI
O
_LPS
BI
O
_LI
NK_O
N
BI
O_PHY_CLK
VDD_PAD1 5V_BI
AS0
5V_BI
AS1
VSS_PC2_CTR1 VSS_PC2_CTR37 VSS_PC2_CTR38 VDD_PAD2 VDD_PAD3 VDD_PAD4 VDD_PAD5 VDD_PAD6 VDD_PAD7 VDD_PAD8 VDD_PAD9 VDD_PAD10 VDD_PAD11 VDD_
CORE1
VDD_
CORE2
VDD_
CORE3
VDD_
CORE4
VDD_
CORE5
VDD_
CORE6
VDD_
CORE7
VDD_25V1 VDD_25V2 VDD_25V3 VDD_25V4 VDD_25V5 VDD_25V6 VDD_25V7 VDD_25V8 VSS_PC2_CTR2 VSS_PC2_CTR3 VSS_PC2_CTR4 VSS_PC2_CTR5 VSS_PC2_CTR6 VSS_PC2_CTR7 VSS_PC2_CTR8 VSS_PC2_CTR9 VSS_PC2_CTR10 VSS_PC2_CTR11 VSS_PC2_CTR12 VSS_PC2_CTR13 VSS_PC2_CTR14 VSS_PC2_CTR15 VSS_PC2_CTR16 VSS_PC2_CTR17 VSS_PC2_CTR18 VSS_PC2_CTR19 VSS_PC2_CTR20 VSS_PC2_CTR21 VSS_PC2_CTR22 VSS_PC2_CTR23 VSS_PC2_CTR24 VSS_PC2_CTR25 VSS_PC2_CTR26 VSS_PC2_CTR27 VSS_PC2_CTR28 VSS_PC2_CTR29 VSS_PC2_CTR30 VSS_PC2_CTR31 VSS_PC2_CTR32 VSS_PC2_CTR33 VSS_PC2_CTR34 VSS_PC2_CTR35 VSS_PC2_CTR36
CS5-
CS4-
CS3-
CS2-
CS1-
CS0-
MA[26]
MS[25]
MA[24]
MA[23]
MA[22]
MA[5]
MA[4]
MA[3]
MA[2]
MA[1]
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MCONFIG
ATAPI_RESET_L
ATAPI_DMAACK_L
ATAPI_DMARQ
ATAPI_IORDY
ATAPI_INTRQ
ATAPI_DIOR_L
ATAPI_DIOW_L
AtapiAddr0
AtapiAddr1
AtapiAddr2
AtapiAddr3
AtapiAddr4
ATAPI_DATA15
ATAPI_DATA14
ATAPI_DATA13
ATAPI_DATA12
ATAPI_DATA11
ATAPI_DATA10
ATAPI_DATA9
ATAPI_DATA8
ATAPI_DATA7
ATAPI_DATA6
ATAPI_DATA5
ATAPI_DATA4
ATAPI_DATA3
ATAPI_DATA2
ATAPI_DATA1
ATAPI_DATA0
ALE
OE-
RST-
UWE-
GPIO1
GPIO2
GPIO3
GPIO0
GPIO4
LWE-
GPIO5
DTACK-
IDC_
CL
K
IDC_
DAT
UART2
_
RX
UART2_TX
*U
ART2_CTS
*U
ART2_RTS UART1
_
RX
UART1_TX
UART1_CTS UART1_RTS
SPI
_M
OSI
SPI
_M
IS
O
SPI
_CS0
SPI
_CS1
SPI
_CS2
SPI
_CLK
*SPI
_CS3
IRTX1
*I
R
T
X
2
AVDD0 AVDD1 AVDD2 AVDD3 VDDX AGND0 AGND1 AGND2 AGND3 GNDX VDD_
REF
R_
REF
VSS_REF
SDRAM
_
DQ2
SDRAM
_
DQ1
SDRAM
_
DQ0
SDRAM
_
DQ3
SDRAM
_
DQ4
SDRAM
_
DQ5
SDRAM
_
DQ6
SDRAM
_
DQ7
SDRAM
_
DQ1
5
SDRAM
_
DQ9
SDRAM
_
DQ1
2
SDRAM
_
DQ1
4
SDRAM
_
DQ1
0
SDRAM
_
DQ1
3
SDRAM
_
DQ1
1
SDRAM
_
DQ8
SDRAM
_
DQ1
6
SDRAM
_
DQ1
7
SDRAM
_
DQ1
8
SDRAM
_
DQ1
9
SDRAM
_
DQ2
0
SDRAM
_
DQ2
1
SDRAM
_
DQ2
2
SDRAM
_
DQ2
3
SDRAM
_
DQ2
4
SDRAM
_
DQ2
5
SDRAM
_
DQ2
7
SDRAM
_
DQ2
6
SDRAM
_
DQ2
8
SDRAM
_
DQ2
9
SDRAM
_
DQ3
0
SDRAM
_
DQ3
1
SDRAM
_
DQS0
SDRAM
_
DQM
0
SDRAM
_
DQS1
SDRAM
_
DQS2
SDRAM
_
DQS3
SDRAM
_
DQM
1
SDRAM
_
DQM
2
SDRAM
_
DQM
3
SDRAM
_
_
A
0
SDRAM
_
_
A
1
SDRAM
_
_
A
2
SDRAM
_
_
A
3
SDRAM
_
_
A
4
SDRAM
_
_
A
5
SDRAM
_
_
A
6
SDRAM
_
_
A
7
SDRAM
_
_
A
8
SDRAM
_
_
A
9
SDRAM
__A10
SDRAM
__A11
SDRAM
__A12
*S
D
R
A
M
__A13
SDRAM
__A14
SDRAM
__A15
SDRAM
_
CAS_L
SDRAM
_
RAS_L
SDRAM
_
CKE
SDRAM
_
W
E
_
L
SDRAM
_
CL
K0
SDRAM
_
CL
K_
L
0
SDRAM
_
CL
K1
SDRAM
_
CL
K_
L
1
SDRAM
_
VREF
AO_D0
AO_D1
AO_D2
AO_D3
AO_SCLK
AO_FSYNC
AO2_D0*
A2_SCLK*
A2_FSYNC*
AO_IEC958
AO_MCLKI
AI2_D*
AI_D0
AI_D1
AI_SCLK
AI_FSYNC
AI_MCLKI
CLKI
CLKX
CLKO
BYPASS_PLL
RSTO*
EPD_L*
TCK
TDI
TDO
TMS
TRST_L
VI_D0
VI_D1
VI_D2
VI_D3
VI_D4
VI_D5
VI_D6
VI_D7
VI_D8
VI_D9
VIO_D0*
VIO_D1*
VIO_D2*
VIO_D3*
VIO_D4*
VIO_D5*
VIO_D6*
VIO_D7*
VIO_D8*
VIO_D9*
VI_E0
VI_VSYNC0
VI_CLK0
VI_E1
VI_VSYNC1*
VI_CLK1*
VO_D0
VO_D1
VO_D2
VO_D3
VO_D4
VO_D5
VO_D6
VO_D7
VO_D8*
VO_D9*
VO_D10*
VO_D11*
VO_D12*
VO_D13*
VO_D14*
VO_D15*
VO_E*
VO_ACTIVE*
VO_HSYNC*
VO_VSYNC*
VO_CLK
SDRAM
__A17
SDRAM
__A16
ATAPI2_RESET_L
ATAPI2_DMAACK_L
ATAPI2_DMARQ
ATAPI2_IORDY
ATAPI2_INTRQ
ATAPI2_DIOR_L
ATAPI2_DIOW_L
Atapi2Addr0
Atapi2Addr1
Atapi2Addr2
Atapi2Addr3
Atapi2Addr4
ATAPI2_DATA15
ATAPI2_DATA14
ATAPI2_DATA13
ATAPI2_DATA12
ATAPI2_DATA11
ATAPI2_DATA10
ATAPI2_DATA9
ATAPI2_DATA8
ATAPI2_DATA7
ATAPI2_DATA6
ATAPI2_DATA5
ATAPI2_DATA4
ATAPI2_DATA3
ATAPI2_DATA2
ATAPI2_DATA1
ATAPI2_DATA0 Dp
lu
s_
0
D
m
inus_0
H
ost
_P
O
_0
Ho
st
_
O
C_
0
D
pl
us_1*
D
m
inus_1*
H
ost
_PO
_1*
H
ost
_O
C
_1*
DAC1
DAC0bar
DAC2
DAC1bar
DAC3
DAC4
DAC_Vdd0(3.3v)
DAC5
DAC_Vdd1(3.3v)
CS0_8BIT
WAIT-
AI_MCLKO
AO_MCLKO
USB_48M
HZ*
DAC_Dvdd (1.8v)
DAC_Dvss
DAC6
U
SB_Avdd0(
3.
3v)
U
SB_Avdd1(
3.
3v)
USB_VSS0 USB_VSS1 VDD_
CORE8
VDD_
CORE9
VDD_
CORE1
0
R9 10K
+
CE1
47UF/16V
R21 22
R4 10K
TX1 1
R6 10K
R22 22
R2 10K
C42
0.1UF
SKT-U1
SKT-BGA388
R34 33
C46
1000PF
C39
0.1UF
R3
5
1
.2
K 1
%
C21
0.1UF
J9
PH6/2MM
1
2
3
4
5
6
C1
15P
C28
1000PF
C43
0.1UF
C19
0.1UF
C48
0.1UF
C15
0.1UF
+
CE4
10UF/1206A
R8 10K
L4 FBMJ2125HS420-T
C27
1000PF
C9
0.01UF
R33
10K
C13
1000PF
C30
0.01UF
L2 FBMJ2125HS420-T
DVDR3588H/93 Main Board Electrical Diagram
6-11 6-11
家电维修资料网，免费下载各种维修资料