EN 63
3139 785 30981
8.
Circuit- and IC description
IC7606 - 96KHz Sampling 24-bit stereo audio ADC
BLOCK
DIAGRAM
d
t
h
UD
A
1361
T
S
MG
T
451
1
VIN
L
ADC
ΣΔ
DI
G
ITA
L
INTERFACE
DC-CANCE
LL
ATION
FI
L
TER
DECI
M
ATION
FI
L
TER
C
L
OC
K
CONTRO
L
3
16
VINR
ADC
ΣΔ
13
DATAO
11
BC
K
1
2
WS
6
SFOR
7
PWON
14
M
SSE
L
15
10
VSSD
9
VDDD
VSSA
5
VRP
4
VRN
2
Vr
ef
8
SYSC
LK
VDDA
Figure 8-10
PIN DESCRIPTION AND CONFIGURATION
SYMB
O
L
P
IN
DESCR
I
P
TION
V
IN
L
1
lef
t
channel inpu
t
V
r
ef
2
r
efe
r
ence v
o
l
t
age
V
INR
3
r
igh
t
channel inpu
t
V
RN
4
nega
t
ive
r
efe
r
ence v
o
l
t
age
V
RP
5
p
o
si
t
ive
r
efe
r
ence v
o
l
t
age
SFOR
6
da
t
a f
or
ma
t
selec
t
i
o
n inpu
t
PWON
7
p
o
we
r
c
o
n
tro
l inpu
t
SYSC
LK
8
sys
t
em cl
o
ck
2
56, 384, 51
2 or
768f
s
V
DDD
9
digi
t
al supply v
o
l
t
age
V
SSD
10
digi
t
al g
ro
und
BC
K
11
b
i
t
cl
o
ck inpu
t/o
u
t
pu
t
WS
1
2
w
or
d selec
t
inpu
t/o
u
t
pu
t
DATAO
13
da
t
a
o
u
t
pu
t
M
SSE
L
14
mas
t
e
r/
slave selec
t
V
SSA
15
anal
o
g g
ro
und
V
DDA
16
anal
o
g supply v
o
l
t
age
hand
boo
k, halfpage
UD
A
1361
T
S
MG
T
45
2
1
2
3
4
5
6
7
8
16
15
14
13
1
2
11
10
9
VIN
L
Vr
ef
VINR
VRN
VRP
SFOR
PWON
SYSC
LK
VDDD
VSSD
BC
K
WS
DATAO
M
SSE
L
VSSA
VDDA